Date: Tue, 7 May 2019 22:18:36 -0700 From: Mark Millard <marklmi@yahoo.com> To: Justin Hibbits <chmeeedalf@gmail.com>, FreeBSD PowerPC ML <freebsd-ppc@freebsd.org> Subject: 2-socket/2-cores-each G5 PowerMac11, 2: I show the initial slb content *before* the FreeBSD kernel makes changes Message-ID: <96069F9E-F422-4663-8C9B-098F1736DAC0@yahoo.com>
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The powerpc64 FreeBSD kernel enables MSR.IR=1 and MSR.DR=1 *before* the below are replaced as live values on the bsp, if I understand what I've read correctly. I added code to record the slb content before slbtrap is even copied over to EXC_ISE and EXC_DSE. I added code to dump the data later. Below I show the index and the esid and vsid parts as they are returned in the registers. I only show indexes with V=1 (valid content). What the investigatory code reported: 0: esid_part=0x08000000 vsid_part=0x0000 1: esid_part=0x18000000 vsid_part=0x1000 2: esid_part=0x28000000 vsid_part=0x2000 3: esid_part=0x38000000 vsid_part=0x3000 4: esid_part=0x48000000 vsid_part=0x4000 5: esid_part=0x58000000 vsid_part=0x5000 6: esid_part=0x68000000 vsid_part=0x6000 7: esid_part=0x78000000 vsid_part=0x7000 8: esid_part=0x88000000 vsid_part=0x8000 9: esid_part=0x98000000 vsid_part=0x9000 10: esid_part=0xa8000000 vsid_part=0xa000 11: esid_part=0xb8000000 vsid_part=0xb000 12: esid_part=0xc8000000 vsid_part=0xc000 13: esid_part=0xd8000000 vsid_part=0xd000 14: esid_part=0xe8000000 vsid_part=0xe000 15: esid_part=0xf8000000 vsid_part=0xf000 === Mark Millard marklmi at yahoo.com ( dsl-only.net went away in early 2018-Mar)
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