From owner-svn-src-all@freebsd.org Fri Dec 11 20:01:45 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id BDA814B8DC7; Fri, 11 Dec 2020 20:01:45 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Ct1rn53mFz4pZT; Fri, 11 Dec 2020 20:01:45 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id A0ADA10CF1; Fri, 11 Dec 2020 20:01:45 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 0BBK1jXM021351; Fri, 11 Dec 2020 20:01:45 GMT (envelope-from mhorne@FreeBSD.org) Received: (from mhorne@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 0BBK1jJU021350; Fri, 11 Dec 2020 20:01:45 GMT (envelope-from mhorne@FreeBSD.org) Message-Id: <202012112001.0BBK1jJU021350@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mhorne set sender to mhorne@FreeBSD.org using -f From: Mitchell Horne Date: Fri, 11 Dec 2020 20:01:45 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r368558 - head/sys/riscv/include X-SVN-Group: head X-SVN-Commit-Author: mhorne X-SVN-Commit-Paths: head/sys/riscv/include X-SVN-Commit-Revision: 368558 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Dec 2020 20:01:45 -0000 Author: mhorne Date: Fri Dec 11 20:01:45 2020 New Revision: 368558 URL: https://svnweb.freebsd.org/changeset/base/368558 Log: riscv: small counter(9) improvements Prefer atomics to critical section. This reduces the cost of the increment operation and removes the possibility of it being interrupted by counter_u64_zero(). Use CPU_FOREACH() macro to skip absent CPUs. Replace hand-rolled address calculation with zpcpu_get(). Reviewed by: markj Differential Revision: https://reviews.freebsd.org/D27536 Modified: head/sys/riscv/include/counter.h Modified: head/sys/riscv/include/counter.h ============================================================================== --- head/sys/riscv/include/counter.h Fri Dec 11 19:45:40 2020 (r368557) +++ head/sys/riscv/include/counter.h Fri Dec 11 20:01:45 2020 (r368558) @@ -30,14 +30,12 @@ #define _MACHINE_COUNTER_H_ #include -#ifdef INVARIANTS -#include -#endif +#include #define EARLY_COUNTER &__pcpu[0].pc_early_dummy_counter -#define counter_enter() critical_enter() -#define counter_exit() critical_exit() +#define counter_enter() do {} while (0) +#define counter_exit() do {} while (0) #ifdef IN_SUBR_COUNTER_C static inline uint64_t @@ -54,19 +52,17 @@ counter_u64_fetch_inline(uint64_t *p) int i; r = 0; - for (i = 0; i < mp_ncpus; i++) - r += counter_u64_read_one((uint64_t *)p, i); + CPU_FOREACH(i) + r += counter_u64_read_one(p, i); return (r); } -/* XXXKIB might interrupt increment */ static void counter_u64_zero_one_cpu(void *arg) { - *((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE * - PCPU_GET(cpuid))) = 0; + *(zpcpu_get((counter_u64_t *)arg)) = 0; } static inline void @@ -78,18 +74,13 @@ counter_u64_zero_inline(counter_u64_t c) } #endif -#define counter_u64_add_protected(c, inc) do { \ - CRITICAL_ASSERT(curthread); \ - *(uint64_t *)zpcpu_get(c) += (inc); \ -} while (0) +#define counter_u64_add_protected(c, inc) counter_u64_add(c, inc) static inline void counter_u64_add(counter_u64_t c, int64_t inc) { - counter_enter(); - counter_u64_add_protected(c, inc); - counter_exit(); + atomic_add_64((uint64_t *)zpcpu_get(c), inc); } #endif /* ! _MACHINE_COUNTER_H_ */