From owner-svn-src-all@FreeBSD.ORG Wed Feb 25 18:50:36 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 008081065670; Wed, 25 Feb 2009 18:50:36 +0000 (UTC) (envelope-from rnoland@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E22A58FC18; Wed, 25 Feb 2009 18:50:35 +0000 (UTC) (envelope-from rnoland@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n1PIoZ6g005183; Wed, 25 Feb 2009 18:50:35 GMT (envelope-from rnoland@svn.freebsd.org) Received: (from rnoland@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n1PIoZV9005182; Wed, 25 Feb 2009 18:50:35 GMT (envelope-from rnoland@svn.freebsd.org) Message-Id: <200902251850.n1PIoZV9005182@svn.freebsd.org> From: Robert Noland Date: Wed, 25 Feb 2009 18:50:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r189051 - head/sys/dev/drm X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Feb 2009 18:50:36 -0000 Author: rnoland Date: Wed Feb 25 18:50:35 2009 New Revision: 189051 URL: http://svn.freebsd.org/changeset/base/189051 Log: Prepare the radeon driver for MSI support. MFC after: 2 weeks Modified: head/sys/dev/drm/radeon_irq.c Modified: head/sys/dev/drm/radeon_irq.c ============================================================================== --- head/sys/dev/drm/radeon_irq.c Wed Feb 25 18:48:33 2009 (r189050) +++ head/sys/dev/drm/radeon_irq.c Wed Feb 25 18:50:35 2009 (r189051) @@ -192,6 +192,7 @@ irqreturn_t radeon_driver_irq_handler(DR (drm_radeon_private_t *) dev->dev_private; u32 stat; u32 r500_disp_int; + u32 tmp; /* Only consider the bits we're interested in - others could be used * outside the DRM @@ -218,6 +219,33 @@ irqreturn_t radeon_driver_irq_handler(DR if (stat & RADEON_CRTC2_VBLANK_STAT) drm_handle_vblank(dev, 1); } + if (dev->msi_enabled) { + switch(dev_priv->flags & RADEON_FAMILY_MASK) { + case CHIP_RS400: + case CHIP_RS480: + tmp = RADEON_READ(RADEON_AIC_CNTL) & + ~RS400_MSI_REARM; + RADEON_WRITE(RADEON_AIC_CNTL, tmp); + RADEON_WRITE(RADEON_AIC_CNTL, + tmp | RS400_MSI_REARM); + break; + case CHIP_RS690: + case CHIP_RS740: + tmp = RADEON_READ(RADEON_BUS_CNTL) & + ~RS600_MSI_REARM; + RADEON_WRITE(RADEON_BUS_CNTL, tmp); + RADEON_WRITE(RADEON_BUS_CNTL, tmp | + RS600_MSI_REARM); + break; + default: + tmp = RADEON_READ(RADEON_MSI_REARM_EN) & + ~RV370_MSI_REARM_EN; + RADEON_WRITE(RADEON_MSI_REARM_EN, tmp); + RADEON_WRITE(RADEON_MSI_REARM_EN, + tmp | RV370_MSI_REARM_EN); + break; + } + } return IRQ_HANDLED; }