Date: Thu, 22 Jan 1998 14:07:35 GMT From: jak@cetlink.net (John Kelly) To: Jaye Mathisen <mrcpu@cdsnet.net> Cc: hackers@FreeBSD.ORG Subject: 64MB SIMM memory problems Message-ID: <34c74d3a.600440@mail.cetlink.net> In-Reply-To: <Pine.NEB.3.95.980121225738.5063V-100000@mail.cdsnet.net> References: <Pine.NEB.3.95.980121225738.5063V-100000@mail.cdsnet.net>
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On Wed, 21 Jan 1998 22:58:44 -0800 (PST), Jaye Mathisen <mrcpu@cdsnet.net> wrote: >I don't think the ram is bad, it's in another machine replacing some 32's >and working fine, I just think maybe the combo of like fast page ECC vs >non-ECC, or some variation in the types was messing it up under stress. A while back some Tyan Tomcat users were complaining they could not populate all 8 of their SIMM sockets and run reliably. I had the same problem with mine, and later learned why after reading some related information on AMI's web site which reveals some very important facts about 64MB SIMMs. The article quoted below contains the relevant portion of the text from AMI's web site. It can be found by searching "Tomecat memory problems" on Dejanews. The misspelling of "Tomecat" is intentional. >In article <5gt0mi$ac3@news2.ais.net>, chip@ais.net.antispam (Chip May) wrote: > > > As soon as I populate 3 or 4, all hell breaks loose. Gone through no > > less than two dozen different simms to get it to work - to no avail. > > Flashed to 3.02 and 40e, and back and forth, reset CMOS ... > > > I welcome a *real* solution rather than hear all the testimonials from > > others who apparently do not suffer this problem..... Looking forward > > to an answer from someone out there... > > >Here's your answer. > >It's not a solution, but the following text from AMI discussing >memory bus overloading explains why many users cannot run a Tyan >Tomcat III with all 8 memory sockets filled. > >In my own experience with the dual board, I can run 96 meg with all >eight sockets filled using 4 16-meg and 4 8-meg SIMMs (double sided), >* BUT ONLY IF * the double sided SIMMs are in the last four sockets. > >If I reverse the order and put the double sided SIMMs in the first >four sockets, it crashes and burns -- Linux 2.0.29 complains during >bootup that I have a problem with my RAM chips. > >The bottom line is that the Intel 430HX chipset does not have enough >electrical power to run 8 memory SIMMs in every flavor and variety of >chips and SIMM configuration -- some may work while others will not. > >Anyway, here's the text from AMI's web site: > > > 1. Special Considerations for the Triton II based boards: > > The evolution of current CPU-support chipsets may be likened to > the development of the compact cars: going to a finer geometry > process reduces the chip size (reducing cost) and improves speed > (vs power consumed) but when it comes to driving the memory bus > (analogous to towing a trailer) there is no real substitute for > size and power. The Triton II, and to a lesser extent the > Natoma, chipset(s) exemplify this trend, and can be problematic > if RAM bus loading is not watched carefully. Because the chipset > provides separate drivers for some signals used by so-called > "doubled-sided" SIMMs (no relationship to how many sides of the > SIMM there are chips mounted on!), the loading needs to be > considered separately for "Single" and "Double-sided" SIMMs: > > "Single-sided" SIMMs are the 1, 4, 16 and 64MB-sized SIMMs. > Generally speaking these all load the chipset equally, as they > normally use 4x larger chips to build each progressively larger > SIMM -- the exception being the 64MB SIMM, which in its most > common version, with 32 or 36 chips, is actually four 16MB SIMMs > on one substrate for loading purposes! Recently 64MB SIMMs > based on 64MB chips and having only 8 or 9 chips on the > substrate have become available, and load the system much like a > 1, 4 or 16MB SIMM. For these SIMMs our loading recommendations > are as follows: 1, 4, or 16MB SIMM, also new 64MB built with > 64MB chips: Triton II (Apollo III/Atlas III/Titan III): two or > four SIMMs Natoma (Merlin/Merlin DP/Megapro): two, four, six or > eight SIMMs (socket space permitting) Conventional 64MB SIMMs > built with 16MB chips: Triton II (Apollo III/Atlas III/Titan > III): NOT RECOMMENDED Natoma (Merlin/Merlin DP/Megapro): two > SIMMs maximum (without regard to socket space) > > "Double-sided" SIMMs are the 2, 8, and 32MB-sized SIMMs. > Generally speaking these all load the chipset equally, as they > normally use 4x larger chips to build each progressively larger > SIMM. For these SIMMs our loading recommendations are as > follows: 2, 8, or 32MB SIMM: > > Triton II (Apollo III/Atlas III/Titan III): two or four SIMMs > Natoma (Merlin/Merlin DP/Megapro): two, four, six or eight SIMMs > (socket space permitting) > > Note that when you are loading to the limit it becomes > increasingly important that the SIMMs have normal speed margins: > industry standards normally provide that a "60ns SIMM" maintain > a speed of 60ns at any ambient from 0 to 70 degrees C. (32 to > 158 degrees F.) AND with 100pf loading on all outputs. When > tested under normal room temperature and test loading conditions > a SIMM that reads at its spec limit is suspect -- one would > expect it to test a bit faster than spec to allow for > degradation under temperature and loading extremes. >
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