Date: Sat, 3 Feb 1996 12:35:21 -0600 (CST) From: Joe Greco <jgreco@brasil.moneng.mei.com> To: fenner@parc.xerox.com (Bill Fenner) Cc: jgreco@brasil.moneng.mei.com, msmith@atrad.adelaide.edu.au, hackers@FreeBSD.org Subject: Re: Watchdog timers (was: Re: Multi-Port Async Cards) Message-ID: <199602031835.MAA13405@brasil.moneng.mei.com> In-Reply-To: <96Feb2.154908pst.177478@crevenia.parc.xerox.com> from "Bill Fenner" at Feb 2, 96 03:48:59 pm
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> In message <199602021854.MAA11875@brasil.moneng.mei.com>you write: > >> If you're going to decode the I/O's already, don't bother with the UART. > > > >Your intent is to emulate the UART? I'm sorry, I'm not THAT good at digital > >logic design :-) I wouldn't know where to start. > > *Software*, Joe! We're hackers, right? Just decode the PC's I/O space in a > creative way to the microprocessor, and let the software on the uP handle the > rest =) I'm hacker enough to know that I wouldn't have a clue about how to do it :-) ... JG
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