From owner-freebsd-arm@freebsd.org Fri Nov 13 15:05:22 2015 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id DF2C1A2E215 for ; Fri, 13 Nov 2015 15:05:21 +0000 (UTC) (envelope-from thomasskibo@yahoo.com) Received: from nm47-vm1.bullet.mail.bf1.yahoo.com (nm47-vm1.bullet.mail.bf1.yahoo.com [216.109.115.124]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 9501819AA for ; Fri, 13 Nov 2015 15:05:21 +0000 (UTC) (envelope-from thomasskibo@yahoo.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yahoo.com; s=s2048; t=1447426957; bh=dIP+rCJcNONE7vUCXQQTvt1GnCGvBwe2VLh4k7BaO9M=; h=Subject:From:In-Reply-To:Date:Cc:References:To:From:Subject; b=e0f2latd+n7I0hZCEFYKry50oPkGilUf7MFoJT7fPVC7Tv87SOX1mn7IJLXFb1LRqDRR7MDQIXE+CgWzwTaKJY/QS6kbp1uCmyVho4NIyzZ9H04+gn1g//JTt8MockcCFIxMneOVfuwdHgeiXuAxkntk8R1mRcquesxwuV01DFg57zMBJGzMuaDxQU7Yq6VWXT449ssK/oNYYm4A7mgfXM+/6/TIOo/7csw41pMP0Od8aLXkbKxq/owmvHOFAcUOYisiWJgmGzFxNIkE+3PUuiwI3m3UTxaXTr0VRqJ2d+38KvvmdK7tAOLlMMeG/2TSDrp/lU0nmWMMeFaJB5Gjtw== Received: from [98.139.215.141] by nm47.bullet.mail.bf1.yahoo.com with NNFMP; 13 Nov 2015 15:02:37 -0000 Received: from [98.139.213.15] by tm12.bullet.mail.bf1.yahoo.com with NNFMP; 13 Nov 2015 15:02:37 -0000 Received: from [127.0.0.1] by smtp115.mail.bf1.yahoo.com with NNFMP; 13 Nov 2015 15:02:37 -0000 X-Yahoo-Newman-Id: 711338.55051.bm@smtp115.mail.bf1.yahoo.com X-Yahoo-Newman-Property: ymail-3 X-YMail-OSG: j9ap8CAVM1khFIxyf0wNxxT5hn06mQWlkWrCtWtkRfZtUJv Fsubiyhk996txDg2IgGbBYDHzDHrCX126bUJJC2HwOJ8EQ86H6f3zPBJKp.4 hE9a_kG3_6qkS5vt2P4valHA.BTKVkmR.wiWfYMEvMYpXV900gRhuqsifr7m R.L67Elgwuoadrwjp5O.BwhVMCmLM.Z4J8XlGVZwGzmes7jofuo0j7n1dVHb YkW8Ku9Ro8l5Yb86sLWIcOc_ZZ8uBMgcXaQac8QheKldJBP57bPJT8jFpgLF W6JJWmFIWNAYGFSWWwINSyg_a3Px3.CY8VWgaCP6v7LNviT4ncFTMUzMsScY 1bcxoTD8io5tqSiiwZjA.g69yWOCUgFR05dHwx6ZywqeNfstfQZEaSHHyboH NTdQ_ihLgV9EmMj790asRFxoo6YjzQSh8k.VCJ75RMtP9JjH6PzeIE.KH5vK rDkouAZ7ldoDs5kdU27qQd0Z4beNvbEe_uqTgpCZ0mw7cx_f2m8LBN_DdCEf qmlDW5R0N1QBpgfT9zUAFQRGNDE.OvUqLwsuo X-Yahoo-SMTP: .8Dytk6swBAeTUTcf.ezO8BKaYfn.mUV Content-Type: multipart/mixed; boundary="Apple-Mail=_B81D5F29-C3A2-4D0C-96A5-215D72465CFE" Mime-Version: 1.0 (Mac OS X Mail 9.1 \(3096.5\)) Subject: Re: Zybo support From: Thomas Skibo In-Reply-To: Date: Fri, 13 Nov 2015 07:02:36 -0800 Cc: "freebsd-arm@freebsd.org" Message-Id: References: To: Adrian Chadd X-Mailer: Apple Mail (2.3096.5) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Nov 2015 15:05:22 -0000 --Apple-Mail=_B81D5F29-C3A2-4D0C-96A5-215D72465CFE Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=utf-8 > On Nov 12, 2015, at 9:43 PM, Adrian Chadd = wrote: >=20 > hi cool! Can you put those two changes up somehere? >=20 > That way we can drag them into -HEAD. >=20 > Thanks! >=20 >=20 > -a >=20 I=E2=80=99ve attached the fdt file zybo.dts for = /usr/src/sys/boot/fdt/dts/arm and the patch file for = /usr/src/sys/arm/conf/ZEDBOARD. Thanks! =E2=80=94 Thomas Skibo thomasskibo@yahoo.com --Apple-Mail=_B81D5F29-C3A2-4D0C-96A5-215D72465CFE Content-Disposition: attachment; filename=zybo.dts Content-Type: application/octet-stream; name="zybo.dts" Content-Transfer-Encoding: 7bit /*- * Copyright (c) 2015 The FreeBSD Foundation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /dts-v1/; / { model = "zybo"; compatible = "digilent,zybo"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&GIC>; // cpus { // #address-cells = <1>; // #size-cells = <0>; // cpu@0 { // device-type = "cpu"; // model = "ARM Cortex-A9"; // }; // }; memory { // First megabyte isn't accessible by all interconnect masters. device_type = "memory"; reg = <0x100000 0x1ff00000>; /* 511MB RAM at 0x100000 */ }; // Zynq PS System registers. // ps7sys@f8000000 { device_type = "soc"; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0xf8000000 0xf10000>; // SLCR block slcr: slcr@7000 { compatible = "xlnx,zy7_slcr"; reg = <0x0 0x1000>; clock-frequency = <50000000>; // 50Mhz PS_CLK }; // Interrupt controller GIC: gic { compatible = "arm,gic"; interrupt-controller; #address-cells = <0>; #interrupt-cells = <1>; reg = <0xf01000 0x1000>, // distributer registers <0xf00100 0x0100>; // CPU if registers }; // L2 cache controller pl310@f02000 { compatible = "arm,pl310"; reg = <0xf02000 0x1000>; interrupts = <34>; interrupt-parent = <&GIC>; }; // Device Config devcfg: devcfg@7000 { compatible = "xlnx,zy7_devcfg"; reg = <0x7000 0x1000>; interrupts = <40>; interrupt-parent = <&GIC>; }; // triple timer counters0,1 ttc0: ttc@1000 { compatible = "xlnx,ttc"; reg = <0x1000 0x1000>; }; ttc1: ttc@2000 { compatible = "xlnx,ttc"; reg = <0x2000 0x1000>; }; // ARM Cortex A9 TWD Timer timer@f00600 { compatible = "arm,mpcore-timers"; clock-frequency = <325000000>; // 325Mhz #address-cells = <1>; #size-cells = <0>; reg = <0xf00200 0x100>, // Global Timer Regs <0xf00600 0x20>; // Private Timer Regs interrupts = < 27 29 >; interrupt-parent = <&GIC>; }; // system watch-dog timer swdt@5000 { device_type = "watchdog"; compatible = "xlnx,zy7_wdt"; reg = <0x5000 0x1000>; interrupts = <41>; interrupt-parent = <&GIC>; }; scuwdt@f00620 { device_type = "watchdog"; compatible = "arm,mpcore_wdt"; reg = <0xf00620 0x20>; interrupts = <30>; interrupt-parent = <&GIC>; reset = <1>; }; }; // pssys@f8000000 // Zynq PS I/O Peripheral registers. // ps7io@e0000000 { device_type = "soc"; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0xe0000000 0x300000>; // uart0: uart@0000 { // device_type = "serial"; // compatible = "cadence,uart"; // reg = <0x0000 0x1000>; // interrupts = <59>; // interrupt-parent = <&GIC>; // clock-frequency = <50000000>; // }; uart1: uart@1000 { device_type = "serial"; compatible = "cadence,uart"; reg = <0x1000 0x1000>; interrupts = <82>; interrupt-parent = <&GIC>; clock-frequency = <50000000>; current-speed = <115200>; }; gpio: gpio@a000 { compatible = "xlnx,zy7_gpio"; reg = <0xa000 0x1000>; interrupts = <52>; interrupt-parent = <&GIC>; }; // GigE eth0: eth@b000 { // device_type = "network"; compatible = "cadence,gem"; reg = <0xb000 0x1000>; interrupts = <54 55>; interrupt-parent = <&GIC>; ref-clock-num = <0>; }; // SDIO sdhci0: sdhci@100000 { compatible = "xlnx,zy7_sdhci"; reg = <0x100000 0x1000>; interrupts = <56>; interrupt-parent = <&GIC>; max-frequency = <50000000>; }; // QSPI qspi0: qspi@d000 { compatible = "xlnx,zy7_qspi"; reg = <0xd000 0x1000>; interrupts = <51>; interrupt-parent = <&GIC>; spi-clock = <50000000>; ref-clock = <200000000>; }; // USB ehci0: ehci@2000 { compatible = "xlnx,zy7_ehci"; reg = <0x2000 0x1000>; interrupts = <53>; interrupt-parent = <&GIC>; }; }; // ps7io@e0000000 chosen { stdin = &uart1; stdout = &uart1; }; }; --Apple-Mail=_B81D5F29-C3A2-4D0C-96A5-215D72465CFE Content-Disposition: attachment; filename=patch.ZEDBOARD.txt Content-Type: text/plain; name="patch.ZEDBOARD.txt" Content-Transfer-Encoding: 7bit Index: sys/arm/conf/ZEDBOARD =================================================================== --- sys/arm/conf/ZEDBOARD (revision 290688) +++ sys/arm/conf/ZEDBOARD (working copy) @@ -1,6 +1,6 @@ # # ZEDBOARD -- Custom configuration for the Xilinx Zynq-7000 based -# ZedBoard (www.zedboard.org) +# ZedBoard (www.zedboard.org) and similar Zynq boards. # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: @@ -59,6 +59,7 @@ device cgem # Zynq-7000 gig ethernet device device mii device e1000phy +device rgephy # Zybo uses Realtek RTL8211E device pty device uart device gpio --Apple-Mail=_B81D5F29-C3A2-4D0C-96A5-215D72465CFE--