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From: Grzegorz Bernacki <gber@FreeBSD.org>
Date: Thu, 16 May 2013 09:43:05 +0000 (UTC)
To: src-committers@freebsd.org, svn-src-all@freebsd.org,
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Subject: svn commit: r250695 - head/sys/arm/arm
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Author: gber
Date: Thu May 16 09:43:04 2013
New Revision: 250695
URL: http://svnweb.freebsd.org/changeset/base/250695

Log:
  Fix L2 cache write-back invalidate for Sheeva core.
  
  Submitted by:	Michal Dubiel
  Obtained from:	Netasq, Semihalf

Modified:
  head/sys/arm/arm/cpufunc_asm_sheeva.S

Modified: head/sys/arm/arm/cpufunc_asm_sheeva.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_sheeva.S	Thu May 16 06:19:29 2013	(r250694)
+++ head/sys/arm/arm/cpufunc_asm_sheeva.S	Thu May 16 09:43:04 2013	(r250695)
@@ -377,9 +377,17 @@ ENTRY(sheeva_l2cache_wb_range)
 END(sheeva_l2cache_wb_range)
 
 ENTRY(sheeva_l2cache_wbinv_all)
+	/* Disable irqs */
+	mrs	r1, cpsr
+	orr	r2, r1, #I32_bit | F32_bit
+	msr	cpsr_c, r2
+
 	mov	r0, #0
 	mcr	p15, 1, r0, c15, c9, 0	/* Clean L2 */
 	mcr	p15, 1, r0, c15, c11, 0	/* Invalidate L2 */
+
+	msr	cpsr_c, r1		/* Reenable irqs */
+
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 	RET
 END(sheeva_l2cache_wbinv_all)