From owner-freebsd-arch@FreeBSD.ORG Fri Oct 5 16:17:36 2012 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 2AC23106566B; Fri, 5 Oct 2012 16:17:36 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from bigwig.baldwin.cx (bigknife-pt.tunnel.tserv9.chi1.ipv6.he.net [IPv6:2001:470:1f10:75::2]) by mx1.freebsd.org (Postfix) with ESMTP id F09F88FC18; Fri, 5 Oct 2012 16:17:35 +0000 (UTC) Received: from jhbbsd.localnet (unknown [209.249.190.124]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 358DBB944; Fri, 5 Oct 2012 12:17:35 -0400 (EDT) From: John Baldwin To: freebsd-arch@freebsd.org Date: Fri, 5 Oct 2012 11:41:16 -0400 User-Agent: KMail/1.13.5 (FreeBSD/8.2-CBSD-20110714-p20; KDE/4.5.5; amd64; ; ) References: <506C385C.3020400@FreeBSD.org> <86a9w1kq94.fsf@ds4.des.no> <20121005133616.GP35915@deviant.kiev.zoral.com.ua> In-Reply-To: <20121005133616.GP35915@deviant.kiev.zoral.com.ua> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Message-Id: <201210051141.16147.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Fri, 05 Oct 2012 12:17:35 -0400 (EDT) Cc: Konstantin Belousov , Dag-Erling Sm??rgrav , Dimitry Andric , Garrett Cooper , Andriy Gapon Subject: Re: x86 boot code build X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Oct 2012 16:17:36 -0000 On Friday, October 05, 2012 9:36:16 am Konstantin Belousov wrote: > On Fri, Oct 05, 2012 at 03:22:31PM +0200, Dag-Erling Sm??rgrav wrote: > > Konstantin Belousov writes: > > > So what ISA additions do you expect to get advantage of by switching > > > to pentium-mmx from 486 ? As I already said, I am not aware of any. > > > > The TSC, for one. MMX, and the ability to use MMX registers to copy > > data. > > TSC is used regardless of the compiler flags, we use it if CPU claims > that TSC is supported, even in usermode. > > Compiler never generates MMX copies. More, in kernel, the manual > FPU context save/restore is needed around the FPU/MMX register file access. I agree with kib. I don't think building i386 releases with > i486 buys you much of anything. Using MMX in the kernel is of dubious value (have to be very careful to use it, and when tested in the past by bde@ for things like bcopy() and bzero() it wasn't a clear win IIRC). Also, for the boot code, the most important thing is size. The text + data + stack for /boot/loader has to all fit below 640k (and the first 40k is reserved by BTX, so you really only have 600k for that, minus any "low" memory consumed by things like PXE ROMs). That is true even on amd64, and won't be any better on x86 until we fully support EFI for booting. -- John Baldwin