From owner-svn-src-all@FreeBSD.ORG Sat Mar 30 04:13:47 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 9A379AEC; Sat, 30 Mar 2013 04:13:47 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 8CFC9F3D; Sat, 30 Mar 2013 04:13:47 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.6/8.14.6) with ESMTP id r2U4DlD1070300; Sat, 30 Mar 2013 04:13:47 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.6/8.14.5/Submit) id r2U4DlHu070299; Sat, 30 Mar 2013 04:13:47 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201303300413.r2U4DlHu070299@svn.freebsd.org> From: Adrian Chadd Date: Sat, 30 Mar 2013 04:13:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r248926 - head/sys/mips/atheros X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 30 Mar 2013 04:13:47 -0000 Author: adrian Date: Sat Mar 30 04:13:47 2013 New Revision: 248926 URL: http://svnweb.freebsd.org/changeset/base/248926 Log: AR933x UART updates: * Default clock is 25MHz; * Remove the UART register macro here - it's not needed as we don't need to "adjust" the register offset / spacing at all; * Remove unused fields in the softc. Tested: * AP121 Modified: head/sys/mips/atheros/uart_dev_ar933x.c Modified: head/sys/mips/atheros/uart_dev_ar933x.c ============================================================================== --- head/sys/mips/atheros/uart_dev_ar933x.c Sat Mar 30 02:26:20 2013 (r248925) +++ head/sys/mips/atheros/uart_dev_ar933x.c Sat Mar 30 04:13:47 2013 (r248926) @@ -41,12 +41,16 @@ __FBSDID("$FreeBSD$"); #include "uart_if.h" -#define DEFAULT_RCLK 1843200 +/* + * Default system clock is 25MHz; see ar933x_chip.c for how + * the startup process determines whether it's 25MHz or 40MHz. + */ +#define DEFAULT_RCLK (25 * 1000 * 1000) #define ar933x_getreg(bas, reg) \ - bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg)) + bus_space_read_4((bas)->bst, (bas)->bsh, reg) #define ar933x_setreg(bas, reg, value) \ - bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value) + bus_space_write_4((bas)->bst, (bas)->bsh, reg, value) #if 0 @@ -325,14 +329,7 @@ ar933x_getc(struct uart_bas *bas, struct */ struct ar933x_softc { struct uart_softc base; -#if 0 - uint8_t fcr; - uint8_t ier; - uint8_t mcr; - - uint8_t ier_mask; - uint8_t ier_rxbits; -#endif + uint32_t u_ier; };