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Date:      Sat, 30 Jul 2011 20:42:14 +0000 (UTC)
From:      Andriy Gapon <avg@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r224528 - in head: release/doc/en_US.ISO8859-1/hardware share/man/man4 tools/tools/sysdoc
Message-ID:  <201107302042.p6UKgEIV014778@svn.freebsd.org>

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Author: avg
Date: Sat Jul 30 20:42:14 2011
New Revision: 224528
URL: http://svn.freebsd.org/changeset/base/224528

Log:
  update smp related documentation after recent changes
  
  Remove references to machdep.hlt_logical_cpus and
  machdep.hlt_cpus sysctls and tunables.
  Document machdep.hyperthreading_allowed and
  hint.lapic.X.disabled tunables.
  
  Prompted by:	ru
  Proofreading:	bf
  Reviewed by:	jhb
  Approved by:	re (kib)

Modified:
  head/release/doc/en_US.ISO8859-1/hardware/article.sgml
  head/share/man/man4/smp.4
  head/tools/tools/sysdoc/tunables.mdoc

Modified: head/release/doc/en_US.ISO8859-1/hardware/article.sgml
==============================================================================
--- head/release/doc/en_US.ISO8859-1/hardware/article.sgml	Sat Jul 30 20:29:39 2011	(r224527)
+++ head/release/doc/en_US.ISO8859-1/hardware/article.sgml	Sat Jul 30 20:42:14 2011	(r224528)
@@ -196,10 +196,8 @@
 	Because this naive scheduling can result in suboptimal
 	performance, under certain circumstances it may be useful to
 	disable the logical processors with the the
-	<varname>machdep.hlt_logical_cpus</varname> sysctl variable.
-	It is also possible to halt any CPU in the idle loop with the
-	<varname>machdep.hlt_cpus</varname> sysctl variable.  The
-	&man.smp.4; manual page has more details.</para>
+	<varname>machdep.hyperthreading_allowed</varname> tunable.
+	The &man.smp.4; manual page has more details.</para>
 
       <para>&os; will take advantage of Physical Address Extensions
 	(PAE) support on CPUs that support this feature.  A kernel

Modified: head/share/man/man4/smp.4
==============================================================================
--- head/share/man/man4/smp.4	Sat Jul 30 20:29:39 2011	(r224527)
+++ head/share/man/man4/smp.4	Sat Jul 30 20:42:14 2011	(r224528)
@@ -63,10 +63,10 @@ the read-only sysctl variable
 .Pp
 .Fx
 allows specific CPUs on a multi-processor system to be disabled.
-The sysctl variable
-.Va machdep.hlt_cpus
-is an integer bitmask denoting CPUs to halt, counting from 0.
-Setting a bit to 1 will result in the corresponding CPU being
+This can be done using the
+.Va hint.lapic.X.disabled
+tunable, where X is the APIC ID of a CPU.
+Setting this tunable to 1 will result in the corresponding CPU being
 disabled.
 .Pp
 The
@@ -122,12 +122,12 @@ tasks on CPUs that are closely grouped t
 supports hyperthreading on Intel CPU's on the i386 and AMD64 platforms.
 Since using logical CPUs can cause performance penalties under certain loads,
 the logical CPUs can be disabled by setting the
-.Va machdep.hlt_logical_cpus
-sysctl to one. 
-Note that this operation is different from the mechanism used by the
+.Va machdep.hyperthreading_allowed
+tunable to zero. 
 .Xr cpuset 1 .
 .Sh SEE ALSO
 .Xr mptable 1 ,
+.Xr loader 8 ,
 .Xr sysctl 8 ,
 .Xr condvar 9 ,
 .Xr msleep 9 ,

Modified: head/tools/tools/sysdoc/tunables.mdoc
==============================================================================
--- head/tools/tools/sysdoc/tunables.mdoc	Sat Jul 30 20:29:39 2011	(r224527)
+++ head/tools/tools/sysdoc/tunables.mdoc	Sat Jul 30 20:42:14 2011	(r224528)
@@ -1233,24 +1233,12 @@ machdep.disable_mtrrs
 machdep.guessed_bootdev
 
 ---
-machdep.hlt_cpus
+machdep.hyperthreading_allowed
 bool
 
-This option will permit the halting
-of CPUs.
-For instance, to halt CPU 0,
-machdep.htl_cpus=1 can be used.
-It is possible to halt two CPUs by providing
-a comma separated list (i.e: cpu1,cpu2).
-
----
-machdep.hlt_logical_cpus
-bool
-
-This keeps the logical CPUs halted in the idle loop.
-By default the logical CPUs are halted at startup.
-It is also possible to halt any cpu in the idle loop now
-using machdep.hlt_cpus.
+Setting this tunable to zero disables
+the use of additional logical processors
+provided by Intel HTT technology.
 
 ---
 machdep.panic_on_nmi



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