From owner-svn-src-head@freebsd.org Fri Jun 5 02:21:46 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 9843D33BA96; Fri, 5 Jun 2020 02:21:46 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 49dRGy3Xyfz4gD2; Fri, 5 Jun 2020 02:21:46 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 74E619C07; Fri, 5 Jun 2020 02:21:46 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 0552LkJA091615; Fri, 5 Jun 2020 02:21:46 GMT (envelope-from mav@FreeBSD.org) Received: (from mav@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 0552Lk2u091614; Fri, 5 Jun 2020 02:21:46 GMT (envelope-from mav@FreeBSD.org) Message-Id: <202006050221.0552Lk2u091614@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mav set sender to mav@FreeBSD.org using -f From: Alexander Motin Date: Fri, 5 Jun 2020 02:21:46 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r361816 - head/sys/dev/ahci X-SVN-Group: head X-SVN-Commit-Author: mav X-SVN-Commit-Paths: head/sys/dev/ahci X-SVN-Commit-Revision: 361816 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jun 2020 02:21:46 -0000 Author: mav Date: Fri Jun 5 02:21:46 2020 New Revision: 361816 URL: https://svnweb.freebsd.org/changeset/base/361816 Log: Limit AHCI to only one MSI if more is not needed. My AMD Ryzen system has 4 AHCI controllers, each supporting 16 MSI vectors. Since two of the controllers have only one SATA port, limit to single MSI saves system 30 interrupt vectors for free. It may be possible to also limit number of MSI vectors to 4 and 8 for the other two controllers, but according to the AHCI specification after that controllers may revert to only one vector, that would be a bigger loss to risk. MFC after: 2 weeks Modified: head/sys/dev/ahci/ahci_pci.c Modified: head/sys/dev/ahci/ahci_pci.c ============================================================================== --- head/sys/dev/ahci/ahci_pci.c Fri Jun 5 01:44:33 2020 (r361815) +++ head/sys/dev/ahci/ahci_pci.c Fri Jun 5 02:21:46 2020 (r361816) @@ -470,6 +470,7 @@ ahci_pci_attach(device_t dev) uint8_t revid = pci_get_revid(dev); int msi_count, msix_count; uint8_t table_bar = 0, pba_bar = 0; + uint32_t caps, pi; msi_count = pci_msi_count(dev); msix_count = pci_msix_count(dev); @@ -604,9 +605,12 @@ ahci_pci_attach(device_t dev) /* Setup MSI register parameters */ /* Process hints. */ + caps = ATA_INL(ctlr->r_mem, AHCI_CAP); + pi = ATA_INL(ctlr->r_mem, AHCI_PI); if (ctlr->quirks & AHCI_Q_NOMSI) ctlr->msi = 0; - else if (ctlr->quirks & AHCI_Q_1MSI) + else if ((ctlr->quirks & AHCI_Q_1MSI) || + ((caps & (AHCI_CAP_NPMASK | AHCI_CAP_CCCS)) == 0 && pi == 1)) ctlr->msi = 1; else ctlr->msi = 2;