From owner-cvs-all@FreeBSD.ORG Wed Feb 23 19:23:11 2005 Return-Path: Delivered-To: cvs-all@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 259A616A4CE; Wed, 23 Feb 2005 19:23:11 +0000 (GMT) Received: from misty.eyesbeyond.com (glewis.dsl.xmission.com [166.70.56.15]) by mx1.FreeBSD.org (Postfix) with ESMTP id 97F9C43D1D; Wed, 23 Feb 2005 19:23:10 +0000 (GMT) (envelope-from glewis@eyesbeyond.com) Received: from misty.eyesbeyond.com (localhost.eyesbeyond.com [127.0.0.1]) by misty.eyesbeyond.com (8.13.3/8.13.3) with ESMTP id j1NJN9hi067040; Wed, 23 Feb 2005 12:23:09 -0700 (MST) (envelope-from glewis@eyesbeyond.com) Received: (from glewis@localhost) by misty.eyesbeyond.com (8.13.3/8.13.3/Submit) id j1NJN8WX067039; Wed, 23 Feb 2005 12:23:08 -0700 (MST) (envelope-from glewis@eyesbeyond.com) X-Authentication-Warning: misty.eyesbeyond.com: glewis set sender to glewis@eyesbeyond.com using -f Date: Wed, 23 Feb 2005 12:23:08 -0700 From: Greg Lewis To: Tom Rhodes Message-ID: <20050223192308.GA66911@misty.eyesbeyond.com> References: <200502230328.j1N3SE5l007218@repoman.freebsd.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200502230328.j1N3SE5l007218@repoman.freebsd.org> User-Agent: Mutt/1.4.2.1i cc: cvs-src@freebsd.org cc: src-committers@freebsd.org cc: cvs-all@freebsd.org Subject: Re: cvs commit: src/share/examples/etc make.conf X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Feb 2005 19:23:11 -0000 On Wed, Feb 23, 2005 at 03:28:14AM +0000, Tom Rhodes wrote: > trhodes 2005-02-23 03:28:14 UTC > > FreeBSD src repository > > Modified files: > share/examples/etc make.conf > Log: > Fix up previous commit by adding prescott and itanium2 CPUs. This still looks a little inconsistent. The "AMD64 architecture" comment section now contains (correctly) "opteron, athlon64, nocona". However, opteron and amd64 are both also listed (again, correctly) in the "(AMD CPUs)" portion of the "Intel x86 architecture" section. But, nocona is not listed in the "(Intel CPUs)" portion of that same section and IMHO should be on the same basis that opteron and athlon64 are listed in the "(AND CPUs)" portion. Also, in the "(Intel CPUs)" portion it looks like the prescott entry should occur earlier based on what I perceive as the sorting of other entries. -- Greg Lewis Email : glewis@eyesbeyond.com Eyes Beyond Web : http://www.eyesbeyond.com Information Technology FreeBSD : glewis@FreeBSD.org