From owner-freebsd-mips@FreeBSD.ORG Fri May 4 22:12:56 2012 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 89442106566B for ; Fri, 4 May 2012 22:12:56 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-pb0-f54.google.com (mail-pb0-f54.google.com [209.85.160.54]) by mx1.freebsd.org (Postfix) with ESMTP id 56CE78FC0C for ; Fri, 4 May 2012 22:12:56 +0000 (UTC) Received: by pbbro2 with SMTP id ro2so4785671pbb.13 for ; Fri, 04 May 2012 15:12:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=YMYZOZMOf9vMKGVdjwUyJe81+fyF1WAHmnSgT0/XKzM=; b=e5f8KAJVj7jf2QIGPJQG4M3MztFvaxvyiqwx8uq046IbDaBpZxGCfTerT28hH+mddp K3W+dQRlW72ubIM+DsIjgdmxGEqNfH8cih9GXnB9sT/4rRLJUlVtw7hmM4NCNQks2ORA ovTtbmunyeTeE52rGS0DXBZTvoZyqXRoeUTkII2ob7Jj6cHDFKH0G3j3SHvqBG/B7hgD ZTMyXwPtgPwS3waKuS2AyZEsBZ/ONXp2y8Z9Dqu/cD8Q1rXlO1S+vaWyFvLugOHyUhR9 K7B8D/KTX8sxkvlDAPjDInlZbflsc5ZqA7riovF/6lD91+3hX3lfZUFjobATs13IwoJ4 gsuw== MIME-Version: 1.0 Received: by 10.68.224.167 with SMTP id rd7mr22779794pbc.129.1336169575815; Fri, 04 May 2012 15:12:55 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.142.101.9 with HTTP; Fri, 4 May 2012 15:12:55 -0700 (PDT) In-Reply-To: References: Date: Fri, 4 May 2012 15:12:55 -0700 X-Google-Sender-Auth: Gq1NQ6SALdrwrTXmL7bwMck2eSQ Message-ID: From: Adrian Chadd To: Patrick Kelsey Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: freebsd-mips@freebsd.org Subject: Re: heads up - ar71xx changes X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 May 2012 22:12:56 -0000 On 4 May 2012 11:30, Patrick Kelsey wrote: > Hmmm. =A0On the RB450G, arge1 is connected to port 5 on the AR8316 > switch, and port 5 on the AR8316 is configured by the boot loader to > bypass the switch complex and connect directly to an internal PHY. > The MDIO bus on the AR8316 is wired to arge0. =A0arge0 is connected to > the cpu port on the AR8316, with no real PHY. =A0That hack diff I sent > is making less and less overall sense (although it does let me limp > along for the moment). > > What I really want is for arge0 to initialize to whatever fixed rate > is hinted (or defaulted when no hint is given), and I want arge1 to > see its PHY on the MDIO bus attached to arge0. =A0Perhaps I should have > ARGE_MDIO defined whereas I currently do not? Right. this is very much like what my AP96 reference board has. The previous code had a hack which was only valid for AR71xx/AR913x, where it assumed arge0 and arge1 miibus were the same - it just used the arge0 MDIO lines. There was no "arge1 MDIO" interface. The AR724x and later SoCs can have 2 MDIO busses. I've "solved" this by using the arge mdio/mii bus split code from stefan, which is in -HEAD. It's a bit of a round about way of specifying mdio and mii busses, but it lets you (later) do weird and wonderful things, like hang an MII bus off of something internal to a switch, so you can hang ukphy or whatever other PHYs off of it. You could look at the AP96 and AP96.hints files in sys/mips/conf/ and see if my arge0/arge1 hints work for you. What _I_ should do is grab that switch driver and see if it works for me. If it does, I may just commit it to -HEAD as a starting point for the switch API that ray@ has been working on, and then bring over his switch API. That at least lets me get AR71xx + AR8316 support for the AP96 and Routerstation Pro boards, and gives me a starting point to do further testing/development with. Thanks! Adrian