From owner-svn-src-head@FreeBSD.ORG Sun May 11 08:31:18 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A256620D; Sun, 11 May 2014 08:31:18 +0000 (UTC) Received: from zxy.spb.ru (zxy.spb.ru [195.70.199.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 5DC6D2F02; Sun, 11 May 2014 08:31:17 +0000 (UTC) Received: from slw by zxy.spb.ru with local (Exim 4.82 (FreeBSD)) (envelope-from ) id 1WjPAA-000E0P-PJ; Sun, 11 May 2014 12:31:14 +0400 Date: Sun, 11 May 2014 12:31:14 +0400 From: Slawa Olhovchenkov To: Adrian Chadd Subject: Re: svn commit: r265792 - head/sys/kern Message-ID: <20140511083114.GA53503@zxy.spb.ru> References: <201405100053.s4A0rbF9080571@svn.freebsd.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201405100053.s4A0rbF9080571@svn.freebsd.org> User-Agent: Mutt/1.5.22 (2013-10-16) X-SA-Exim-Connect-IP: X-SA-Exim-Mail-From: slw@zxy.spb.ru X-SA-Exim-Scanned: No (on zxy.spb.ru); SAEximRunCond expanded to false Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 11 May 2014 08:31:18 -0000 On Sat, May 10, 2014 at 12:53:37AM +0000, Adrian Chadd wrote: > Author: adrian > Date: Sat May 10 00:53:36 2014 > New Revision: 265792 > URL: http://svnweb.freebsd.org/changeset/base/265792 > > Log: > Add in support to optionally pin the swi threads. > > Under enough load, the swi's can actually be preempted and migrated > to other currently free cores. When doing RSS experiments, this lead > to the per-CPU TCP timers not lining up any more with the RX CPU said > flows were ending up on, leading to increased lock contention. > > Since there was a little pushback on flipping them on by default, > I've left the default at "don't pin." > > The other less obvious problem here is that the default swi > is also the same as the destination swi for CPU #0. So if one > pins the swi on CPU #0, there's no default floating swi. > > A nice future project would be to create a separate swi for > the "default" floating swi, as well as per-CPU swis that are > (optionally) pinned. MFC planed? I have 10.0 box with aprox. 16Gbit TCP at peak.