Date: Sun, 4 Oct 2015 12:17:59 +0000 (UTC) From: Niclas Zeising <zeising@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r398571 - in head/cad/iverilog: . files Message-ID: <201510041217.t94CHx5M097504@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: zeising Date: Sun Oct 4 12:17:59 2015 New Revision: 398571 URL: https://svnweb.freebsd.org/changeset/ports/398571 Log: Update to 10.0 Committed from: EuroBSDCon 2015 Modified: head/cad/iverilog/Makefile head/cad/iverilog/distinfo head/cad/iverilog/files/patch-load_module.cc head/cad/iverilog/pkg-plist Modified: head/cad/iverilog/Makefile ============================================================================== --- head/cad/iverilog/Makefile Sun Oct 4 11:02:36 2015 (r398570) +++ head/cad/iverilog/Makefile Sun Oct 4 12:17:59 2015 (r398571) @@ -2,10 +2,9 @@ # $FreeBSD$ PORTNAME= iverilog -PORTVERSION= 0.9.7 +PORTVERSION= 10.0 CATEGORIES= cad -MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ \ - ftp://ftp.geda.seul.org/pub/geda/dist/ +MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ DISTNAME= verilog-${PORTVERSION} MAINTAINER= zeising@FreeBSD.org Modified: head/cad/iverilog/distinfo ============================================================================== --- head/cad/iverilog/distinfo Sun Oct 4 11:02:36 2015 (r398570) +++ head/cad/iverilog/distinfo Sun Oct 4 12:17:59 2015 (r398571) @@ -1,2 +1,2 @@ -SHA256 (verilog-0.9.7.tar.gz) = 7a5e72e17bfb4c3a59264d8f3cc4e70a7c49c1307173348fdd44e079388e7454 -SIZE (verilog-0.9.7.tar.gz) = 1238088 +SHA256 (verilog-10.0.tar.gz) = 179f09afbafb951bea28c9001b06ed8b9b2e54181092d48e343cb20f436b1185 +SIZE (verilog-10.0.tar.gz) = 1683102 Modified: head/cad/iverilog/files/patch-load_module.cc ============================================================================== --- head/cad/iverilog/files/patch-load_module.cc Sun Oct 4 11:02:36 2015 (r398570) +++ head/cad/iverilog/files/patch-load_module.cc Sun Oct 4 12:17:59 2015 (r398571) @@ -1,10 +1,10 @@ ---- load_module.cc.orig Thu Jul 17 20:49:38 2003 -+++ load_module.cc Thu Jul 17 20:49:51 2003 -@@ -24,6 +24,7 @@ +--- load_module.cc.orig 2015-08-23 21:41:41 UTC ++++ load_module.cc +@@ -21,6 +21,7 @@ # include "util.h" # include "parse_api.h" # include "compiler.h" +# include <assert.h> # include <iostream> # include <map> - # include <string> + # include <cstdlib> Modified: head/cad/iverilog/pkg-plist ============================================================================== --- head/cad/iverilog/pkg-plist Sun Oct 4 11:02:36 2015 (r398570) +++ head/cad/iverilog/pkg-plist Sun Oct 4 12:17:59 2015 (r398571) @@ -4,8 +4,12 @@ bin/vvp include/iverilog/_pli_types.h include/iverilog/acc_user.h include/iverilog/ivl_target.h +include/iverilog/sv_vpi_user.h include/iverilog/veriuser.h include/iverilog/vpi_user.h +lib/ivl/blif-s.conf +lib/ivl/blif.conf +lib/ivl/blif.tgt lib/ivl/cadpli.vpl lib/ivl/include/constants.vams lib/ivl/include/disciplines.vams @@ -14,18 +18,33 @@ lib/ivl/ivlpp lib/ivl/null-s.conf lib/ivl/null.conf lib/ivl/null.tgt +lib/ivl/pcb-s.conf +lib/ivl/pcb.conf +lib/ivl/pcb.tgt +lib/ivl/sizer-s.conf +lib/ivl/sizer.conf +lib/ivl/sizer.tgt lib/ivl/stub-s.conf lib/ivl/stub.conf lib/ivl/stub.tgt lib/ivl/system.sft lib/ivl/system.vpi +lib/ivl/vlog95-s.conf +lib/ivl/vlog95.conf +lib/ivl/vlog95.tgt +lib/ivl/vpi_debug.vpi lib/ivl/v2005_math.sft lib/ivl/v2005_math.vpi +lib/ivl/v2009.sft +lib/ivl/v2009.vpi lib/ivl/va_math.sft lib/ivl/va_math.vpi lib/ivl/vhdl-s.conf +lib/ivl/vhdl_sys.sft +lib/ivl/vhdl_sys.vpi lib/ivl/vhdl.conf lib/ivl/vhdl.tgt +lib/ivl/vhdlpp lib/ivl/vvp-s.conf lib/ivl/vvp.conf lib/ivl/vvp.tgt
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201510041217.t94CHx5M097504>