Date: Mon, 21 Dec 1998 15:25:44 +0100 (MET) From: Jean-Marc Zucconi <jmz@FreeBSD.ORG> To: doconnor@gsoft.com.au Cc: freebsd-hackers@FreeBSD.ORG Subject: Re: PCI IRQ mappings Message-ID: <199812211425.PAA48229@qix> In-Reply-To: <XFMail.981221143604.doconnor@gsoft.com.au>
next in thread | previous in thread | raw e-mail | index | archive | help
>>>>> Daniel O'Connor writes: > On 21-Dec-98 Jean-Marc Zucconi wrote: >> > is to shuffle cards in the machine. Is there a better way? :) >> I think you just have to change the interrupt line register in the >> configuration registers, and maybe the route control register (offset >> 0x60) > Hmmm.. I looked at offset 60 and its the 'DRAM Row Boundary Registers' in device 0, and > non existant in device 1. You looked in the MXTC documentation. The interrupt routing is described in the PIIX4 documentation (PCI-TO-ISA/IDE XCELERATOR), 20956201.pdf. Jean-Marc -- Jean-Marc Zucconi PGP Key: finger jmz@FreeBSD.ORG To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199812211425.PAA48229>