Date: Mon, 14 Nov 2022 21:36:05 -0500 From: Paul Procacci <pprocacci@gmail.com> To: Daniel Cervus <DanieltheDeer@outlook.com> Cc: "freebsd-questions@freebsd.org" <freebsd-questions@freebsd.org> Subject: Re: Question about AMD64 ABI Message-ID: <CAFbbPuhLw5jmTJ4vRHzipRyXOMibvGf3sVTfT3-SvYJE9KTQ-g@mail.gmail.com> In-Reply-To: <TYWP286MB26671E6E71B017771F2FFEACB8049@TYWP286MB2667.JPNP286.PROD.OUTLOOK.COM> References: <TYWP286MB2667CF3A93A8F585030D4883B8049@TYWP286MB2667.JPNP286.PROD.OUTLOOK.COM> <TYWP286MB26671E6E71B017771F2FFEACB8049@TYWP286MB2667.JPNP286.PROD.OUTLOOK.COM>
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--000000000000646d0705ed7938fb Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Nov 14, 2022 at 9:19 PM Daniel Cervus <DanieltheDeer@outlook.com> wrote: > > Again, most compilers are smart enough to perhaps `and reg, 0x0FFFF` or > simply ignore the high bits on its own, but ultimately you do feed it the > entire register in which if the callee expects to operate on 16-bits or > smaller it better do so. > > > So I had better zero-extend it to 32 bit, right? Why not 64, because it= =E2=80=99s > already safe enough? > > Or just because the higher 32 bits can be automatically cleared? > Operations on 32 bit operands clear (sets to 0) bits 32 through 63 automatically of a given register. and eax, 0xFFFF This clears bits 16 through 63 because the operand is a 32 bit one. It's implicit due to this convention. The following however, doesn't touch any of the bits higher than 16. and ax, 0xFFFF This is because your operand isn't 32 bits. Both are in essence working the same rax/eax/ax register, but rules of what zero's when play roles here. The easiest way to remember this is when you use a 32-bit register as your operand, bits 32 through 64 will almost always get reset to zero. I honestly suck at explaining things clearly. Perhaps the manual itself can explain it better than I. Section 3.4 is where Intel describes the behavior I'm trying to describe. https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-= 32-architectures-software-developer-vol-1-manual.pdf ~Paul --=20 __________________ :(){ :|:& };: --000000000000646d0705ed7938fb Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable <div dir=3D"ltr"><div><div><div dir=3D"ltr"><br></div><br><div class=3D"gma= il_quote"><div dir=3D"ltr" class=3D"gmail_attr">On Mon, Nov 14, 2022 at 9:1= 9 PM Daniel Cervus <<a href=3D"mailto:DanieltheDeer@outlook.com">Danielt= heDeer@outlook.com</a>> wrote:<br></div><blockquote class=3D"gmail_quote= " style=3D"margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);= padding-left:1ex"> <div dir=3D"auto"> <div dir=3D"ltr"></div> <blockquote type=3D"cite"> <div dir=3D"ltr"><br> </div> <blockquote type=3D"cite"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <blockquote type=3D"cite"></blockquote> <blockquote type=3D"cite"></blockquote> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </blockquote> <blockquote type=3D"cite"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <blockquote type=3D"cite"></blockquote> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </blockquote> </blockquote> <blockquote type=3D"cite"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <blockquote type=3D"cite"> <div style=3D"color:rgb(88,86,214)"> Again, most compilers are smart enough to perhaps `and reg, 0x0FFFF` or sim= ply ignore the high bits on its own, but ultimately you do feed it the enti= re register in which if the callee expects to operate on 16-bits or smaller= it better do so.</div> </blockquote> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </blockquote> <blockquote type=3D"cite"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <div dir=3D"ltr"> <blockquote type=3D"cite"></blockquote> <div dir=3D"ltr"><br> </div> So I had better zero-extend it to 32 bit, right? Why not 64, because it=E2= =80=99s already safe enough?<br> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </blockquote> Or just because the higher 32 bits can be automatically cleared? </div> </blockquote></div><br clear=3D"all"></div>Operations on 32 bit operands cl= ear (sets to 0) bits 32 through 63 automatically of a given register.<br></= div><br><div>and eax, 0xFFFF<br><br></div><div>This clears bits 16 through = 63 because the operand is a 32 bit one.=C2=A0 It's implicit due to this= convention.<br></div><div>The following however, doesn't touch any of = the bits higher than 16.<br><br></div><div>and ax, 0xFFFF<br></div><div><br= ></div><div>This is because your operand isn't 32 bits.<br></div><div>B= oth are in essence working the same rax/eax/ax register, but rules of what = zero's when play roles here.<br><br></div><div>The easiest way to remem= ber this is when you use a 32-bit register as your operand, bits 32 through= 64 will almost always get reset to zero.</div><div><br>I honestly suck at = explaining things clearly.=C2=A0 Perhaps the manual itself can explain it b= etter than I.=C2=A0 Section 3.4 is where Intel describes the behavior I'= ;m trying to describe.<br><a href=3D"https://www.intel.com/content/dam/www/= public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vo= l-1-manual.pdf">https://www.intel.com/content/dam/www/public/us/en/document= s/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf</a></d= iv><div><br></div>~Paul<br><div><div><div>-- <br><div dir=3D"ltr" class=3D"= gmail_signature">__________________<br><br>:(){ :|:& };:</div></div></d= iv></div></div> --000000000000646d0705ed7938fb--
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