From owner-freebsd-smp Wed Nov 20 14:07:02 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id OAA13752 for smp-outgoing; Wed, 20 Nov 1996 14:07:02 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id OAA13744 for ; Wed, 20 Nov 1996 14:06:55 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id PAA27179; Wed, 20 Nov 1996 15:05:38 -0700 Message-Id: <199611202205.PAA27179@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: Peter Wemm cc: cbrown@aracnet.com, Barney Wolff , freebsd-smp@freebsd.org Subject: Re: reinventing vs copying In-reply-to: Your message of "Thu, 21 Nov 1996 05:35:30 +0800." <199611202135.FAA13316@spinner.DIALix.COM> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 20 Nov 1996 15:05:38 -0700 Sender: owner-smp@freebsd.org X-Loop: FreeBSD.org Precedence: bulk Hi, >bit registers on a per-cpu basis, ie: cpu 2 cannot see what's masked in >cpu 1's registers (without an APIC remote read) and so on. beware, the P6 dropped the "Remote Read" delivery mode... --- >- we need to be able to have the 8259's online for some (current) hardware. I have an experimental model working where I am using ExtINT mode on APIC INT0 to read the 8254 timer via the 8259. Using the 8259 to pass a vector for ONE INT source turns out to be rather painless, handling more than 1 INT via the 8259 would be ugly, you have to start managing the masks & etc. in the 8259. But I also realized that there is a more fundimental problem. The 'low priority' and 'ExtInt' delivery modes are mutually exclusive! This means that INTs deliveried via the 8259/ExtInt CANNOT be sent by the 'low priority' delivery mode. They either go to a specific CPU or they can be "broadcast" (I think) to all CPUs. This might be OK for the 8259 timer INT, but more general INTs would be "cumbersome" in this mode. --- >I personally think that the right "temporary" solution for the edge >trigger problem is to never disable the IO apic pin (for edge only), and >simply wear the cost of the relatively rare occasions when the interrupts >*do* interrupt their own handlers. what is this cost, panic or corruption? -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK-----