Date: Fri, 15 Jul 2011 10:02:59 -0600 From: Warner Losh <imp@bsdimp.com> To: Adrian Chadd <adrian@FreeBSD.org> Cc: freebsd-mips@FreeBSD.org Subject: Re: [PATCH] Fix initialization of i8259 controller on MALTA Message-ID: <023BB8FE-D486-4D3C-80F3-642BEB8FD72C@bsdimp.com> In-Reply-To: <CAJ-VmomRrFLKTTx%2BMMwgRVU5wSjDA59Tuy%2B6Fnbx0qFXMgVjKA@mail.gmail.com> References: <CAOfDtXMgw%2BTa7=-uDz-O8xVFxAmQqREM7NMpAwgXMzr8mxbNeg@mail.gmail.com> <CAJ-VmomRrFLKTTx%2BMMwgRVU5wSjDA59Tuy%2B6Fnbx0qFXMgVjKA@mail.gmail.com>
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On Jul 15, 2011, at 4:08 AM, Adrian Chadd wrote: > The obvious question - is QEMU correct here? >=20 > Has anyone tried this on a real board? I'm not sure this has booted on a real board in a long time. Not = because it is broken, but because the MALTA boards are kinda old. Warner >=20 > Adrian >=20 > On 15 July 2011 08:16, Robert Millan <rmh@debian.org> wrote: >> Hi, >>=20 >> i8259 controller is initialized incorrectly on MALTA. It writes mask >> bits to control register and control bits to mask register. >>=20 >> The former causes ICW1_RESET|ICW1_LTIM combination to be written to >> control register, which on QEMU results in "level sensitive irq not >> supported" error. >>=20 >> -- >> Robert Millan >>=20 >> _______________________________________________ >> freebsd-mips@freebsd.org mailing list >> http://lists.freebsd.org/mailman/listinfo/freebsd-mips >> To unsubscribe, send any mail to = "freebsd-mips-unsubscribe@freebsd.org" >>=20 >>=20 > _______________________________________________ > freebsd-mips@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-mips > To unsubscribe, send any mail to = "freebsd-mips-unsubscribe@freebsd.org" >=20 >=20
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