From owner-freebsd-arch@FreeBSD.ORG Thu Nov 4 23:57:14 2004 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7FC2016A4CE; Thu, 4 Nov 2004 23:57:14 +0000 (GMT) Received: from apollo.backplane.com (apollo.backplane.com [216.240.41.2]) by mx1.FreeBSD.org (Postfix) with ESMTP id 5077743D4C; Thu, 4 Nov 2004 23:57:14 +0000 (GMT) (envelope-from dillon@apollo.backplane.com) Received: from apollo.backplane.com (localhost [127.0.0.1]) iA4NvBvA024365; Thu, 4 Nov 2004 15:57:11 -0800 (PST) (envelope-from dillon@apollo.backplane.com) Received: (from dillon@localhost) by apollo.backplane.com (8.12.9p2/8.12.9/Submit) id iA4NvAkY024364; Thu, 4 Nov 2004 15:57:10 -0800 (PST) (envelope-from dillon) Date: Thu, 4 Nov 2004 15:57:10 -0800 (PST) From: Matthew Dillon Message-Id: <200411042357.iA4NvAkY024364@apollo.backplane.com> To: John Baldwin References: <48555.1099585930@critter.freebsd.dk> <418A5A72.6020700@freebsd.org> <200411041456.33778.jhb@FreeBSD.org> cc: arch@freebsd.org cc: Dag-Erling =?iso-8859-1?q?Sm=F8rgrav?= cc: Poul-Henning Kamp cc: Scott Long cc: freebsd-arch@freebsd.org Subject: Re: HEADSUP: HZ=1000 by default on i386 X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Nov 2004 23:57:14 -0000 :Identical to x86 for now. Note that it would be really nice at some point to :drive hardclock and statclock via the local APIC timers for SMP on x86 and :amd64 so we can stop sending IPIs for each clock interrupt. Alpha uses the :per-CPU timers this way already. : :-- :John Baldwin <>< http://www.FreeBSD.org/~jhb/ I'd recommend taking a look at the DragonFly SYSTIMER API which is basically exactly what you need here. It has a simple API for registration and management of any number of one-shot and periodic timer events, with interrupt callback (the frame is available), per-cpu distribution, and so forth. Right now we are driving the backend off a single timer but the API is designed with the future use of per-cpu LAPIC timers in mind. The SYSTIMER module will also aggregate events that happen to occur at the same time. It's a very nice abstraction and you could probably even port it over without also having to port our IPI messaging (though I would strongly recommend you do that too). You could even adapt it to be based off a fixed HZ timer, it just means it will aggregate more events, though my original purpose for writing it was to make a fine-grained abstraction available to the system. All of our clock distribution is based on separately registered systimers now instead of being integrated into one big huge mess like it is in the BSD's (which in turn was inherited from CSRG and hacked to pieces ever since). Interfacing the systimer module to a machine-dependant clock interrupt ought to be fairly trivial. It's only 218 lines, *inclusive* of the DFly copyright. http://www.dragonflybsd.org/cgi-bin/cvsweb.cgi/src/sys/kern/kern_systimer.c http://www.dragonflybsd.org/cgi-bin/cvsweb.cgi/src/sys/sys/systimer.h -Matt Matthew Dillon