From owner-freebsd-smp Wed Jul 16 20:54:15 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.5/8.8.5) id UAA01540 for smp-outgoing; Wed, 16 Jul 1997 20:54:15 -0700 (PDT) Received: from Ilsa.StevesCafe.com (Ilsa.StevesCafe.com [205.168.119.129]) by hub.freebsd.org (8.8.5/8.8.5) with ESMTP id UAA01527 for ; Wed, 16 Jul 1997 20:54:01 -0700 (PDT) Received: from Ilsa.StevesCafe.com (localhost [127.0.0.1]) by Ilsa.StevesCafe.com (8.8.6/8.8.5) with ESMTP id VAA11792; Wed, 16 Jul 1997 21:52:30 -0600 (MDT) Message-Id: <199707170352.VAA11792@Ilsa.StevesCafe.com> X-Mailer: exmh version 2.0gamma 1/27/96 From: Steve Passe To: Peter Wemm cc: listuser , Chuck Robey , smp@FreeBSD.ORG Subject: Re: HEADS UP: EISA cards. In-reply-to: Your message of "Thu, 17 Jul 1997 11:36:57 +0800." <199707170336.LAA23469@spinner.dialix.com.au> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 16 Jul 1997 21:52:30 -0600 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Peter, > Again, remember that the feature that we are talking about (DMA Chaining) > ... > purpose of building a high performance system with multiple CPUs anyway. a related aspect of this is the functionality we gain by programming IO APIC pin 0 as a 'regular' INT. Specifically, the 8259 becomes nothing more than a buffer chip for the 8254 timer. It probably delays the clock INT by about 10nsec, but this is probably pretty constant. And the timer returns to being on vec[ 0 ] as a result. We might consider programming ALL systems this way, whether they connect the timer to IO APIC pin 2 or not. This would eliminate the "song and dance" I go thru using the vec[] array and the indirections thru it to get to the hardware resumption routines. This may well be why intel designed the PR440FX board to NOT have an IO APIC pin 2 connection to the timer. -- Steve Passe | powered by smp@csn.net | Symmetric MultiProcessor FreeBSD