From owner-svn-src-all@FreeBSD.ORG Fri Aug 1 01:48:42 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 35EC7EB3; Fri, 1 Aug 2014 01:48:42 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 237B32732; Fri, 1 Aug 2014 01:48:42 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s711mgmn067998; Fri, 1 Aug 2014 01:48:42 GMT (envelope-from alc@svn.freebsd.org) Received: (from alc@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s711mfDj067996; Fri, 1 Aug 2014 01:48:41 GMT (envelope-from alc@svn.freebsd.org) Message-Id: <201408010148.s711mfDj067996@svn.freebsd.org> From: Alan Cox Date: Fri, 1 Aug 2014 01:48:41 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r269365 - head/sys/powerpc/aim X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Aug 2014 01:48:42 -0000 Author: alc Date: Fri Aug 1 01:48:41 2014 New Revision: 269365 URL: http://svnweb.freebsd.org/changeset/base/269365 Log: Correct a long-standing problem in moea{,64}_pvo_enter() that was revealed by the combination of r268591 and r269134: When we attempt to add the wired attribute to an existing mapping, moea{,64}_pvo_enter() do nothing. (They only set the wired attribute on newly created mappings.) Tested by: andreast Modified: head/sys/powerpc/aim/mmu_oea.c head/sys/powerpc/aim/mmu_oea64.c Modified: head/sys/powerpc/aim/mmu_oea.c ============================================================================== --- head/sys/powerpc/aim/mmu_oea.c Fri Aug 1 01:30:16 2014 (r269364) +++ head/sys/powerpc/aim/mmu_oea.c Fri Aug 1 01:48:41 2014 (r269365) @@ -1951,7 +1951,21 @@ moea_pvo_enter(pmap_t pm, uma_zone_t zon if ((pvo->pvo_pte.pte.pte_lo & PTE_RPGN) == pa && (pvo->pvo_pte.pte.pte_lo & PTE_PP) == (pte_lo & PTE_PP)) { + /* + * The PTE is not changing. Instead, this may + * be a request to change the mapping's wired + * attribute. + */ mtx_unlock(&moea_table_mutex); + if ((flags & PVO_WIRED) != 0 && + (pvo->pvo_vaddr & PVO_WIRED) == 0) { + pvo->pvo_vaddr |= PVO_WIRED; + pm->pm_stats.wired_count++; + } else if ((flags & PVO_WIRED) == 0 && + (pvo->pvo_vaddr & PVO_WIRED) != 0) { + pvo->pvo_vaddr &= ~PVO_WIRED; + pm->pm_stats.wired_count--; + } return (0); } moea_pvo_remove(pvo, -1); Modified: head/sys/powerpc/aim/mmu_oea64.c ============================================================================== --- head/sys/powerpc/aim/mmu_oea64.c Fri Aug 1 01:30:16 2014 (r269364) +++ head/sys/powerpc/aim/mmu_oea64.c Fri Aug 1 01:48:41 2014 (r269365) @@ -2234,6 +2234,7 @@ moea64_pvo_enter(mmu_t mmu, pmap_t pm, u uint64_t pte_lo, int flags) { struct pvo_entry *pvo; + uintptr_t pt; uint64_t vsid; int first; u_int ptegidx; @@ -2276,13 +2277,42 @@ moea64_pvo_enter(mmu_t mmu, pmap_t pm, u if ((pvo->pvo_pte.lpte.pte_lo & LPTE_RPGN) == pa && (pvo->pvo_pte.lpte.pte_lo & (LPTE_NOEXEC | LPTE_PP)) == (pte_lo & (LPTE_NOEXEC | LPTE_PP))) { + /* + * The physical page and protection are not + * changing. Instead, this may be a request + * to change the mapping's wired attribute. + */ + pt = -1; + if ((flags & PVO_WIRED) != 0 && + (pvo->pvo_vaddr & PVO_WIRED) == 0) { + pt = MOEA64_PVO_TO_PTE(mmu, pvo); + pvo->pvo_vaddr |= PVO_WIRED; + pvo->pvo_pte.lpte.pte_hi |= LPTE_WIRED; + pm->pm_stats.wired_count++; + } else if ((flags & PVO_WIRED) == 0 && + (pvo->pvo_vaddr & PVO_WIRED) != 0) { + pt = MOEA64_PVO_TO_PTE(mmu, pvo); + pvo->pvo_vaddr &= ~PVO_WIRED; + pvo->pvo_pte.lpte.pte_hi &= ~LPTE_WIRED; + pm->pm_stats.wired_count--; + } if (!(pvo->pvo_pte.lpte.pte_hi & LPTE_VALID)) { + KASSERT(pt == -1, + ("moea64_pvo_enter: valid pt")); /* Re-insert if spilled */ i = MOEA64_PTE_INSERT(mmu, ptegidx, &pvo->pvo_pte.lpte); if (i >= 0) PVO_PTEGIDX_SET(pvo, i); moea64_pte_overflow--; + } else if (pt != -1) { + /* + * The PTE's wired attribute is not a + * hardware feature, so there is no + * need to invalidate any TLB entries. + */ + MOEA64_PTE_CHANGE(mmu, pt, + &pvo->pvo_pte.lpte, pvo->pvo_vpn); } return (0); }