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Date:      Sun, 4 Feb 1996 12:12:59 +1030 (CST)
From:      Michael Smith <msmith@atrad.adelaide.edu.au>
To:        bde@zeta.org.au (Bruce Evans)
Cc:        msmith@atrad.adelaide.edu.au, phk@critter.tfs.com, hackers@FreeBSD.org, jgreco@brasil.moneng.mei.com
Subject:   Re: Watchdog timers (was: Re: Multi-Port Async Cards)
Message-ID:  <199602040143.MAA02867@genesis.atrad.adelaide.edu.au>
In-Reply-To: <199602031341.AAA16215@godzilla.zeta.org.au> from "Bruce Evans" at Feb 4, 96 00:41:27 am

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Bruce Evans stands accused of saying:
> 
> Actually I don't have the data sheet and haven't seen it for a few years.
> I seem to remember that there is an 8254 feature (automatic latch?) that
> we should be using.

Ah, sorry.  Yes, you can latch any selection of the counters and then
read them back at leisture.

> Can you easily latch multiple 8254 counters at once in hardware?  I think
> it would work to put them at the same address for writes and at different
> addresses for reads.

Um, remapping the addresses for the 8254 would be very messy.
Basically you have a control register and three data registers,
one for each counter.  To perform a readback of, say the first two 
counters, you would write an appropriate Counter Latch command to
the command register, and then read back LSB and MSB from each of 
the counter data registers.

> Is the slowness only the usual slowness for multiple 8-bit reads?

Yes.  I can't vouch for the 8254 at bus speeds of more than 10MHz
though, but on a standard 8MHz bus it should be fine.

> Bruce

-- 
]] Mike Smith, Software Engineer        msmith@atrad.adelaide.edu.au    [[
]] Genesis Software                     genesis@atrad.adelaide.edu.au   [[
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