Date: Fri, 28 Aug 2015 11:40:58 +0300 From: Mihai Carabas <mihai.carabas@gmail.com> To: Zbigniew Bodek <zbodek@gmail.com> Cc: "freebsd-arm@freebsd.org" <freebsd-arm@freebsd.org> Subject: Re: GIC - interrupts interpretation in DTS/FDT Message-ID: <CANg1yUum2sodFL86nj-k6N4W7SSdzEUNdXGtGg8H5_razosKZg@mail.gmail.com> In-Reply-To: <CALF_TxkHNkVnyed1=ax1wodWSqNoH03OQxqafuD2mwKO1AW-CA@mail.gmail.com> References: <CANg1yUtKG228sck71TOhOJ%2BHJ%2BdVdo5Pic0XLvqTPWw%2BUVzFcA@mail.gmail.com> <CALF_TxkHNkVnyed1=ax1wodWSqNoH03OQxqafuD2mwKO1AW-CA@mail.gmail.com>
next in thread | previous in thread | raw e-mail | index | archive | help
On Fri, Aug 28, 2015 at 11:35 AM, Zbigniew Bodek <zbodek@gmail.com> wrote: > Hello Mihai, > > This documents may be helpful: > > https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/gic.txt > > The meaning of each interrupt cell (for ARM GIC) is described there. > > Thank you for pointing me out that document. The problem I was asking was specific to the FreeBSD gic code: """ 165 >------->------- * The hardware only supports active-high-level or rising-edge. 166 >------->------- */ 167 >------->-------if (fdt32_to_cpu(intr[2]) & 0x0a) { 168 >------->------->-------printf("unsupported trigger/polarity configuration " 169 >------->------->------- "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f); 170 >------->------->-------return (ENOTSUP); 171 >------->-------} """ It is verified the not supported bits in both cases (PPIs and SPIs) and I didn't understand why. Probably a bug. Thank you, Mihai
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?CANg1yUum2sodFL86nj-k6N4W7SSdzEUNdXGtGg8H5_razosKZg>