Date: Wed, 13 Sep 2023 22:27:17 GMT From: Eric Joyner <erj@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 9c30461dd25b - main - ice(4): Update to 1.38.16-k Message-ID: <202309132227.38DMRHOi029248@gitrepo.freebsd.org>
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The branch main has been updated by erj: URL: https://cgit.FreeBSD.org/src/commit/?id=9c30461dd25bac49045acbeac10e00b6cc13d2bc commit 9c30461dd25bac49045acbeac10e00b6cc13d2bc Author: Eric Joyner <erj@FreeBSD.org> AuthorDate: 2023-08-24 23:26:13 +0000 Commit: Eric Joyner <erj@FreeBSD.org> CommitDate: 2023-09-13 22:26:54 +0000 ice(4): Update to 1.38.16-k New features - Add sysctl "link_active_on_if_down" (defaults to 1 to match previous behavior): set this to 0 to have the driver bring the physical link down when the interface is brought administratively down - Add sysctl "temp" to read chip temperature on E810 devices; this requires a 4.30 or newer NVM (see package sysutils/intel-nvmupdate-100g) Bug fixes and general changes - (linked to irdma) properly propagate PF reset request from irdma driver - (linked to irdma) properly notify irdma of an impending PF reset - (linked to irdma) move Protocol Engine error handling to irdma - Print log message when using a DDP that doesn't support the "TX balancing" mode - Block LLDP agent configuration when DSCP QoS mode is enabled - Fix kernel panic when updating NVM when adapter is in the "TX balancing" mode - Remove ice_sbq_cmd.h since it's unused - Fix LLDP RX filter to still allow LLDP frames to be received by SW after a PF reset in SW LLDP mode - Add ice_if_needs_restart handler in order to fix a bad VLAN and link down interaction - Issue PF reset during unload - nvmupdate process fixes - Use pci_msix_table_bar() to get MSI-X bar index at runtime instead of hardcoding it Signed-off-by: Eric Joyner <erj@FreeBSD.org> Reviewed by: anzhu@netapp.com MFC after: 3 days Sponsored by: Intel Corporation, NetApp Differential Revision: https://reviews.freebsd.org/D41655 --- sys/dev/ice/ice_adminq_cmd.h | 123 ++++++---- sys/dev/ice/ice_common.c | 490 +++++++++++++++++++++------------------- sys/dev/ice/ice_common.h | 6 +- sys/dev/ice/ice_controlq.c | 110 ++++----- sys/dev/ice/ice_controlq.h | 3 - sys/dev/ice/ice_dcb.c | 2 +- sys/dev/ice/ice_ddp_common.c | 4 + sys/dev/ice/ice_ddp_common.h | 1 + sys/dev/ice/ice_defs.h | 4 +- sys/dev/ice/ice_features.h | 2 + sys/dev/ice/ice_flow.c | 41 +++- sys/dev/ice/ice_flow.h | 6 +- sys/dev/ice/ice_fw_logging.c | 4 +- sys/dev/ice/ice_fwlog.c | 1 + sys/dev/ice/ice_lan_tx_rx.h | 1 - sys/dev/ice/ice_lib.c | 239 ++++++++++++++++++-- sys/dev/ice/ice_lib.h | 16 +- sys/dev/ice/ice_rdma.c | 16 ++ sys/dev/ice/ice_rdma.h | 80 ++++++- sys/dev/ice/ice_rdma_internal.h | 17 ++ sys/dev/ice/ice_sbq_cmd.h | 120 ---------- sys/dev/ice/ice_sched.c | 104 +++++++-- sys/dev/ice/ice_sched.h | 42 +++- sys/dev/ice/ice_strings.c | 4 + sys/dev/ice/ice_switch.c | 334 +++++++++++++++------------ sys/dev/ice/ice_switch.h | 86 ++++--- sys/dev/ice/ice_type.h | 112 ++++++++- sys/dev/ice/if_ice_iflib.c | 130 +++++++++-- sys/dev/ice/irdma_di_if.m | 5 + sys/dev/ice/irdma_if.m | 4 + sys/dev/ice/virtchnl.h | 2 +- 31 files changed, 1360 insertions(+), 749 deletions(-) diff --git a/sys/dev/ice/ice_adminq_cmd.h b/sys/dev/ice/ice_adminq_cmd.h index 710830e95a16..e4dc14b0162c 100644 --- a/sys/dev/ice/ice_adminq_cmd.h +++ b/sys/dev/ice/ice_adminq_cmd.h @@ -168,6 +168,7 @@ struct ice_aqc_list_caps_elem { #define ICE_AQC_CAPS_LED 0x0061 #define ICE_AQC_CAPS_SDP 0x0062 #define ICE_AQC_CAPS_WR_CSR_PROT 0x0064 +#define ICE_AQC_CAPS_SENSOR_READING 0x0067 #define ICE_AQC_CAPS_LOGI_TO_PHYSI_PORT_MAP 0x0073 #define ICE_AQC_CAPS_SKU 0x0074 #define ICE_AQC_CAPS_PORT_MAP 0x0075 @@ -180,7 +181,8 @@ struct ice_aqc_list_caps_elem { #define ICE_AQC_CAPS_EXT_TOPO_DEV_IMG3 0x0084 #define ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE 0x0085 #define ICE_AQC_CAPS_NAC_TOPOLOGY 0x0087 -#define ICE_AQC_CAPS_DYN_FLATTENING 0x0090 +#define ICE_AQC_CAPS_DYN_FLATTENING 0x008A +#define ICE_AQC_CAPS_OROM_RECOVERY_UPDATE 0x0090 #define ICE_AQC_CAPS_ROCEV2_LAG 0x0092 u8 major_ver; @@ -793,12 +795,30 @@ struct ice_aqc_sw_rules { __le32 addr_low; }; +/* Add switch rule response: + * Content of return buffer is same as the input buffer. The status field and + * LUT index are updated as part of the response + */ +struct ice_aqc_sw_rules_elem_hdr { + __le16 type; /* Switch rule type, one of T_... */ +#define ICE_AQC_SW_RULES_T_LKUP_RX 0x0 +#define ICE_AQC_SW_RULES_T_LKUP_TX 0x1 +#define ICE_AQC_SW_RULES_T_LG_ACT 0x2 +#define ICE_AQC_SW_RULES_T_VSI_LIST_SET 0x3 +#define ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR 0x4 +#define ICE_AQC_SW_RULES_T_PRUNE_LIST_SET 0x5 +#define ICE_AQC_SW_RULES_T_PRUNE_LIST_CLEAR 0x6 + __le16 status; +}; + /* Add/Update/Get/Remove lookup Rx/Tx command/response entry * This structures describes the lookup rules and associated actions. "index" * is returned as part of a response to a successful Add command, and can be * used to identify the rule for Update/Get/Remove commands. */ struct ice_sw_rule_lkup_rx_tx { + struct ice_aqc_sw_rules_elem_hdr hdr; + __le16 recipe_id; #define ICE_SW_RECIPE_LOGICAL_PORT_FWD 10 /* Source port for LOOKUP_RX and source VSI in case of LOOKUP_TX */ @@ -877,14 +897,17 @@ struct ice_sw_rule_lkup_rx_tx { * lookup-type */ __le16 hdr_len; - u8 hdr[STRUCT_HACK_VAR_LEN]; + u8 hdr_data[STRUCT_HACK_VAR_LEN]; }; +#pragma pack(1) /* Add/Update/Remove large action command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the action for Update/Get/Remove commands. */ struct ice_sw_rule_lg_act { + struct ice_aqc_sw_rules_elem_hdr hdr; + __le16 index; /* Index in large action table */ __le16 size; /* Max number of large actions */ @@ -939,50 +962,30 @@ struct ice_sw_rule_lg_act { #define ICE_LG_ACT_STAT_COUNT_M (0x7F << ICE_LG_ACT_STAT_COUNT_S) __le32 act[STRUCT_HACK_VAR_LEN]; /* array of size for actions */ }; +#pragma pack() +#pragma pack(1) /* Add/Update/Remove VSI list command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the VSI list for Update/Get/Remove commands. */ struct ice_sw_rule_vsi_list { + struct ice_aqc_sw_rules_elem_hdr hdr; + __le16 index; /* Index of VSI/Prune list */ __le16 number_vsi; __le16 vsi[STRUCT_HACK_VAR_LEN]; /* Array of number_vsi VSI numbers */ }; +#pragma pack() #pragma pack(1) /* Query VSI list command/response entry */ struct ice_sw_rule_vsi_list_query { __le16 index; - ice_declare_bitmap(vsi_list, ICE_MAX_VSI); + u8 vsi_list[DIVIDE_AND_ROUND_UP(ICE_MAX_VSI, BITS_PER_BYTE)]; }; #pragma pack() -#pragma pack(1) -/* Add switch rule response: - * Content of return buffer is same as the input buffer. The status field and - * LUT index are updated as part of the response - */ -struct ice_aqc_sw_rules_elem { - __le16 type; /* Switch rule type, one of T_... */ -#define ICE_AQC_SW_RULES_T_LKUP_RX 0x0 -#define ICE_AQC_SW_RULES_T_LKUP_TX 0x1 -#define ICE_AQC_SW_RULES_T_LG_ACT 0x2 -#define ICE_AQC_SW_RULES_T_VSI_LIST_SET 0x3 -#define ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR 0x4 -#define ICE_AQC_SW_RULES_T_PRUNE_LIST_SET 0x5 -#define ICE_AQC_SW_RULES_T_PRUNE_LIST_CLEAR 0x6 - __le16 status; - union { - struct ice_sw_rule_lkup_rx_tx lkup_tx_rx; - struct ice_sw_rule_lg_act lg_act; - struct ice_sw_rule_vsi_list vsi_list; - struct ice_sw_rule_vsi_list_query vsi_list_query; - } pdata; -}; - -#pragma pack() - /* PFC Ignore (direct 0x0301) * The command and response use the same descriptor structure */ @@ -994,8 +997,8 @@ struct ice_aqc_pfc_ignore { u8 reserved[14]; }; -/* Set PFC Mode (direct 0x0303) - * Query PFC Mode (direct 0x0302) +/* Query PFC Mode (direct 0x0302) + * Set PFC Mode (direct 0x0303) */ struct ice_aqc_set_query_pfc_mode { u8 pfc_mode; @@ -1098,9 +1101,9 @@ struct ice_aqc_txsched_elem { u8 generic; #define ICE_AQC_ELEM_GENERIC_MODE_M 0x1 #define ICE_AQC_ELEM_GENERIC_PRIO_S 0x1 -#define ICE_AQC_ELEM_GENERIC_PRIO_M (0x7 << ICE_AQC_ELEM_GENERIC_PRIO_S) +#define ICE_AQC_ELEM_GENERIC_PRIO_M (0x7 << ICE_AQC_ELEM_GENERIC_PRIO_S) #define ICE_AQC_ELEM_GENERIC_SP_S 0x4 -#define ICE_AQC_ELEM_GENERIC_SP_M (0x1 << ICE_AQC_ELEM_GENERIC_SP_S) +#define ICE_AQC_ELEM_GENERIC_SP_M (0x1 << ICE_AQC_ELEM_GENERIC_SP_S) #define ICE_AQC_ELEM_GENERIC_ADJUST_VAL_S 0x5 #define ICE_AQC_ELEM_GENERIC_ADJUST_VAL_M \ (0x3 << ICE_AQC_ELEM_GENERIC_ADJUST_VAL_S) @@ -1673,6 +1676,32 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; +/* Get sensor reading (direct 0x0632) */ +struct ice_aqc_get_sensor_reading { + u8 sensor; +#define ICE_AQC_INT_TEMP_SENSOR 0x0 + u8 format; +#define ICE_AQC_INT_TEMP_FORMAT 0x0 + u8 reserved[6]; + __le32 addr_high; + __le32 addr_low; +}; + +/* Get sensor reading response (direct 0x0632) */ +struct ice_aqc_get_sensor_reading_resp { + union { + u8 raw[8]; + /* Output data for sensor 0x00, format 0x00 */ + struct { + s8 temp; + u8 temp_warning_threshold; + u8 temp_critical_threshold; + u8 temp_fatal_threshold; + u8 reserved[4]; + } s0f0; + } data; +}; + /* DNL Get Status command (indirect 0x0680) * Structure used for the response, the command uses the generic * ice_aqc_generic struct to pass a buffer address to the FW. @@ -2476,6 +2505,19 @@ struct ice_aqc_get_set_rss_keys { u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE]; }; +enum ice_lut_type { + ICE_LUT_VSI = 0, + ICE_LUT_PF = 1, + ICE_LUT_GLOBAL = 2, + ICE_LUT_TYPE_MASK = 3 +}; + +enum ice_lut_size { + ICE_LUT_VSI_SIZE = 64, + ICE_LUT_GLOBAL_SIZE = 512, + ICE_LUT_PF_SIZE = 2048, +}; + /* Get/Set RSS LUT (indirect 0x0B05/0x0B03) */ struct ice_aqc_get_set_rss_lut { #define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15) @@ -2484,21 +2526,13 @@ struct ice_aqc_get_set_rss_lut { __le16 vsi_id; #define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S 0 #define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M \ - (0x3 << ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S) - -#define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI 0 -#define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF 1 -#define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL 2 + (ICE_LUT_TYPE_MASK << ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S) #define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S 2 #define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M \ - (0x3 << ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) + (ICE_LUT_TYPE_MASK << ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) -#define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128 128 -#define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128_FLAG 0 -#define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512 512 #define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512_FLAG 1 -#define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K 2048 #define ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K_FLAG 2 #define ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_S 4 @@ -2686,7 +2720,7 @@ struct ice_aqc_move_rdma_qset_buffer { }; /* Download Package (indirect 0x0C40) */ -/* Also used for Update Package (indirect 0x0C42 and 0x0C41) */ +/* Also used for Update Package (indirect 0x0C41 and 0x0C42) */ struct ice_aqc_download_pkg { u8 flags; #define ICE_AQC_DOWNLOAD_PKG_LAST_BUF 0x01 @@ -2989,6 +3023,8 @@ struct ice_aq_desc { struct ice_aqc_get_phy_caps get_phy; struct ice_aqc_set_phy_cfg set_phy; struct ice_aqc_restart_an restart_an; + struct ice_aqc_get_sensor_reading get_sensor_reading; + struct ice_aqc_get_sensor_reading_resp get_sensor_reading_resp; struct ice_aqc_dnl_get_status get_status; struct ice_aqc_dnl_run_command dnl_run; struct ice_aqc_dnl_call_command dnl_call; @@ -3239,6 +3275,7 @@ enum ice_adminq_opc { ice_aqc_opc_get_link_status = 0x0607, ice_aqc_opc_set_event_mask = 0x0613, ice_aqc_opc_set_mac_lb = 0x0620, + ice_aqc_opc_get_sensor_reading = 0x0632, ice_aqc_opc_dnl_get_status = 0x0680, ice_aqc_opc_dnl_run = 0x0681, ice_aqc_opc_dnl_call = 0x0682, diff --git a/sys/dev/ice/ice_common.c b/sys/dev/ice/ice_common.c index a3f50f251533..0df73583e137 100644 --- a/sys/dev/ice/ice_common.c +++ b/sys/dev/ice/ice_common.c @@ -343,6 +343,88 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, return ICE_SUCCESS; } +/** + * ice_phy_maps_to_media + * @phy_type_low: PHY type low bits + * @phy_type_high: PHY type high bits + * @media_mask_low: media type PHY type low bitmask + * @media_mask_high: media type PHY type high bitmask + * + * Return true if PHY type [low|high] bits are only of media type PHY types + * [low|high] bitmask. + */ +static bool +ice_phy_maps_to_media(u64 phy_type_low, u64 phy_type_high, + u64 media_mask_low, u64 media_mask_high) +{ + /* check if a PHY type exist for media type */ + if (!(phy_type_low & media_mask_low || + phy_type_high & media_mask_high)) + return false; + + /* check that PHY types are only of media type */ + if (!(phy_type_low & ~media_mask_low) && + !(phy_type_high & ~media_mask_high)) + return true; + + return false; +} + +/** + * ice_set_media_type - Sets media type + * @pi: port information structure + * + * Set ice_port_info PHY media type based on PHY type. This should be called + * from Get PHY caps with media. + */ +static void ice_set_media_type(struct ice_port_info *pi) +{ + enum ice_media_type *media_type; + u64 phy_type_high, phy_type_low; + + phy_type_high = pi->phy.phy_type_high; + phy_type_low = pi->phy.phy_type_low; + media_type = &pi->phy.media_type; + + /* if no media, then media type is NONE */ + if (!(pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE)) + *media_type = ICE_MEDIA_NONE; + /* else if PHY types are only BASE-T, then media type is BASET */ + else if (ice_phy_maps_to_media(phy_type_low, phy_type_high, + ICE_MEDIA_BASET_PHY_TYPE_LOW_M, 0)) + *media_type = ICE_MEDIA_BASET; + /* else if any PHY type is BACKPLANE, then media type is BACKPLANE */ + else if (phy_type_low & ICE_MEDIA_BP_PHY_TYPE_LOW_M || + phy_type_high & ICE_MEDIA_BP_PHY_TYPE_HIGH_M) + *media_type = ICE_MEDIA_BACKPLANE; + /* else if PHY types are only optical, or optical and C2M, then media + * type is FIBER + */ + else if (ice_phy_maps_to_media(phy_type_low, phy_type_high, + ICE_MEDIA_OPT_PHY_TYPE_LOW_M, 0) || + (phy_type_low & ICE_MEDIA_OPT_PHY_TYPE_LOW_M && + phy_type_low & ICE_MEDIA_C2M_PHY_TYPE_LOW_M)) + *media_type = ICE_MEDIA_FIBER; + /* else if PHY types are only DA, or DA and C2C, then media type DA */ + else if (ice_phy_maps_to_media(phy_type_low, phy_type_high, + ICE_MEDIA_DAC_PHY_TYPE_LOW_M, 0) || + (phy_type_low & ICE_MEDIA_DAC_PHY_TYPE_LOW_M && + (phy_type_low & ICE_MEDIA_C2C_PHY_TYPE_LOW_M || + phy_type_high & ICE_MEDIA_C2C_PHY_TYPE_HIGH_M))) + *media_type = ICE_MEDIA_DA; + /* else if PHY types are only C2M or only C2C, then media is AUI */ + else if (ice_phy_maps_to_media(phy_type_low, phy_type_high, + ICE_MEDIA_C2M_PHY_TYPE_LOW_M, + ICE_MEDIA_C2M_PHY_TYPE_HIGH_M) || + ice_phy_maps_to_media(phy_type_low, phy_type_high, + ICE_MEDIA_C2C_PHY_TYPE_LOW_M, + ICE_MEDIA_C2C_PHY_TYPE_HIGH_M)) + *media_type = ICE_MEDIA_AUI; + + else + *media_type = ICE_MEDIA_UNKNOWN; +} + /** * ice_aq_get_phy_caps - returns PHY capabilities * @pi: port information structure @@ -434,6 +516,9 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, ice_memcpy(pi->phy.link_info.module_type, &pcaps->module_type, sizeof(pi->phy.link_info.module_type), ICE_NONDMA_TO_NONDMA); + ice_set_media_type(pi); + ice_debug(hw, ICE_DBG_LINK, "%s: media_type = 0x%x\n", prefix, + pi->phy.media_type); } return status; @@ -513,156 +598,6 @@ ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, return ICE_ERR_DOES_NOT_EXIST; } -/** - * ice_is_media_cage_present - * @pi: port information structure - * - * Returns true if media cage is present, else false. If no cage, then - * media type is backplane or BASE-T. - */ -static bool ice_is_media_cage_present(struct ice_port_info *pi) -{ - struct ice_aqc_get_link_topo *cmd; - struct ice_aq_desc desc; - - cmd = &desc.params.get_link_topo; - - ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); - - cmd->addr.topo_params.node_type_ctx = - (ICE_AQC_LINK_TOPO_NODE_CTX_PORT << - ICE_AQC_LINK_TOPO_NODE_CTX_S); - - /* set node type */ - cmd->addr.topo_params.node_type_ctx |= - (ICE_AQC_LINK_TOPO_NODE_TYPE_M & - ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE); - - /* Node type cage can be used to determine if cage is present. If AQC - * returns error (ENOENT), then no cage present. If no cage present then - * connection type is backplane or BASE-T. - */ - return ice_aq_get_netlist_node(pi->hw, cmd, NULL, NULL); -} - -/** - * ice_get_media_type - Gets media type - * @pi: port information structure - */ -static enum ice_media_type ice_get_media_type(struct ice_port_info *pi) -{ - struct ice_link_status *hw_link_info; - - if (!pi) - return ICE_MEDIA_UNKNOWN; - - hw_link_info = &pi->phy.link_info; - if (hw_link_info->phy_type_low && hw_link_info->phy_type_high) - /* If more than one media type is selected, report unknown */ - return ICE_MEDIA_UNKNOWN; - - if (hw_link_info->phy_type_low) { - /* 1G SGMII is a special case where some DA cable PHYs - * may show this as an option when it really shouldn't - * be since SGMII is meant to be between a MAC and a PHY - * in a backplane. Try to detect this case and handle it - */ - if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII && - (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == - ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE || - hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == - ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE)) - return ICE_MEDIA_DA; - - switch (hw_link_info->phy_type_low) { - case ICE_PHY_TYPE_LOW_1000BASE_SX: - case ICE_PHY_TYPE_LOW_1000BASE_LX: - case ICE_PHY_TYPE_LOW_10GBASE_SR: - case ICE_PHY_TYPE_LOW_10GBASE_LR: - case ICE_PHY_TYPE_LOW_25GBASE_SR: - case ICE_PHY_TYPE_LOW_25GBASE_LR: - case ICE_PHY_TYPE_LOW_40GBASE_SR4: - case ICE_PHY_TYPE_LOW_40GBASE_LR4: - case ICE_PHY_TYPE_LOW_50GBASE_SR2: - case ICE_PHY_TYPE_LOW_50GBASE_LR2: - case ICE_PHY_TYPE_LOW_50GBASE_SR: - case ICE_PHY_TYPE_LOW_50GBASE_FR: - case ICE_PHY_TYPE_LOW_50GBASE_LR: - case ICE_PHY_TYPE_LOW_100GBASE_SR4: - case ICE_PHY_TYPE_LOW_100GBASE_LR4: - case ICE_PHY_TYPE_LOW_100GBASE_SR2: - case ICE_PHY_TYPE_LOW_100GBASE_DR: - return ICE_MEDIA_FIBER; - case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC: - case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC: - case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC: - case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC: - case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC: - case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC: - case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC: - case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC: - return ICE_MEDIA_FIBER; - case ICE_PHY_TYPE_LOW_100BASE_TX: - case ICE_PHY_TYPE_LOW_1000BASE_T: - case ICE_PHY_TYPE_LOW_2500BASE_T: - case ICE_PHY_TYPE_LOW_5GBASE_T: - case ICE_PHY_TYPE_LOW_10GBASE_T: - case ICE_PHY_TYPE_LOW_25GBASE_T: - return ICE_MEDIA_BASET; - case ICE_PHY_TYPE_LOW_10G_SFI_DA: - case ICE_PHY_TYPE_LOW_25GBASE_CR: - case ICE_PHY_TYPE_LOW_25GBASE_CR_S: - case ICE_PHY_TYPE_LOW_25GBASE_CR1: - case ICE_PHY_TYPE_LOW_40GBASE_CR4: - case ICE_PHY_TYPE_LOW_50GBASE_CR2: - case ICE_PHY_TYPE_LOW_50GBASE_CP: - case ICE_PHY_TYPE_LOW_100GBASE_CR4: - case ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4: - case ICE_PHY_TYPE_LOW_100GBASE_CP2: - return ICE_MEDIA_DA; - case ICE_PHY_TYPE_LOW_25G_AUI_C2C: - case ICE_PHY_TYPE_LOW_40G_XLAUI: - case ICE_PHY_TYPE_LOW_50G_LAUI2: - case ICE_PHY_TYPE_LOW_50G_AUI2: - case ICE_PHY_TYPE_LOW_50G_AUI1: - case ICE_PHY_TYPE_LOW_100G_AUI4: - case ICE_PHY_TYPE_LOW_100G_CAUI4: - if (ice_is_media_cage_present(pi)) - return ICE_MEDIA_AUI; - /* fall-through */ - case ICE_PHY_TYPE_LOW_1000BASE_KX: - case ICE_PHY_TYPE_LOW_2500BASE_KX: - case ICE_PHY_TYPE_LOW_2500BASE_X: - case ICE_PHY_TYPE_LOW_5GBASE_KR: - case ICE_PHY_TYPE_LOW_10GBASE_KR_CR1: - case ICE_PHY_TYPE_LOW_10G_SFI_C2C: - case ICE_PHY_TYPE_LOW_25GBASE_KR: - case ICE_PHY_TYPE_LOW_25GBASE_KR1: - case ICE_PHY_TYPE_LOW_25GBASE_KR_S: - case ICE_PHY_TYPE_LOW_40GBASE_KR4: - case ICE_PHY_TYPE_LOW_50GBASE_KR_PAM4: - case ICE_PHY_TYPE_LOW_50GBASE_KR2: - case ICE_PHY_TYPE_LOW_100GBASE_KR4: - case ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4: - return ICE_MEDIA_BACKPLANE; - } - } else { - switch (hw_link_info->phy_type_high) { - case ICE_PHY_TYPE_HIGH_100G_AUI2: - case ICE_PHY_TYPE_HIGH_100G_CAUI2: - if (ice_is_media_cage_present(pi)) - return ICE_MEDIA_AUI; - /* fall-through */ - case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4: - return ICE_MEDIA_BACKPLANE; - case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC: - case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC: - return ICE_MEDIA_FIBER; - } - } - return ICE_MEDIA_UNKNOWN; -} - #define ice_get_link_status_datalen(hw) ICE_GET_LINK_STATUS_DATALEN_V1 /** @@ -681,7 +616,6 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, struct ice_aqc_get_link_status_data link_data = { 0 }; struct ice_aqc_get_link_status *resp; struct ice_link_status *li_old, *li; - enum ice_media_type *hw_media_type; struct ice_fc_info *hw_fc_info; bool tx_pause, rx_pause; struct ice_aq_desc desc; @@ -694,7 +628,6 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, hw = pi->hw; li_old = &pi->phy.link_info_old; - hw_media_type = &pi->phy.media_type; li = &pi->phy.link_info; hw_fc_info = &pi->fc; @@ -716,7 +649,6 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, li->link_speed = LE16_TO_CPU(link_data.link_speed); li->phy_type_low = LE64_TO_CPU(link_data.phy_type_low); li->phy_type_high = LE64_TO_CPU(link_data.phy_type_high); - *hw_media_type = ice_get_media_type(pi); li->link_info = link_data.link_info; li->link_cfg_err = link_data.link_cfg_err; li->an_info = link_data.an_info; @@ -747,7 +679,6 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, (unsigned long long)li->phy_type_low); ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n", (unsigned long long)li->phy_type_high); - ice_debug(hw, ICE_DBG_LINK, " media_type = 0x%x\n", *hw_media_type); ice_debug(hw, ICE_DBG_LINK, " link_info = 0x%x\n", li->link_info); ice_debug(hw, ICE_DBG_LINK, " link_cfg_err = 0x%x\n", li->link_cfg_err); ice_debug(hw, ICE_DBG_LINK, " an_info = 0x%x\n", li->an_info); @@ -1066,7 +997,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_cqinit; - hw->port_info = (struct ice_port_info *) + if (!hw->port_info) + hw->port_info = (struct ice_port_info *) ice_malloc(hw, sizeof(*hw->port_info)); if (!hw->port_info) { status = ICE_ERR_NO_MEMORY; @@ -1205,7 +1137,7 @@ void ice_deinit_hw(struct ice_hw *hw) */ enum ice_status ice_check_reset(struct ice_hw *hw) { - u32 cnt, reg = 0, grst_timeout, uld_mask; + u32 cnt, reg = 0, grst_timeout, uld_mask, reset_wait_cnt; /* Poll for Device Active state in case a recent CORER, GLOBR, * or EMPR has occurred. The grst delay value is in 100ms units. @@ -1237,8 +1169,10 @@ enum ice_status ice_check_reset(struct ice_hw *hw) uld_mask = ICE_RESET_DONE_MASK | (hw->func_caps.common_cap.iwarp ? GLNVM_ULD_PE_DONE_M : 0); + reset_wait_cnt = ICE_PF_RESET_WAIT_COUNT; + /* Device is Active; check Global Reset processes are done */ - for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) { + for (cnt = 0; cnt < reset_wait_cnt; cnt++) { reg = rd32(hw, GLNVM_ULD) & uld_mask; if (reg == uld_mask) { ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt); @@ -1247,7 +1181,7 @@ enum ice_status ice_check_reset(struct ice_hw *hw) ice_msec_delay(10, true); } - if (cnt == ICE_PF_RESET_WAIT_COUNT) { + if (cnt == reset_wait_cnt) { ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n", reg); return ICE_ERR_RESET_FAILED; @@ -1265,7 +1199,7 @@ enum ice_status ice_check_reset(struct ice_hw *hw) */ static enum ice_status ice_pf_reset(struct ice_hw *hw) { - u32 cnt, reg; + u32 cnt, reg, reset_wait_cnt, cfg_lock_timeout; /* If at function entry a global reset was already in progress, i.e. * state is not 'device active' or any of the reset done bits are not @@ -1290,8 +1224,10 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw) * timeout plus the PFR timeout which will account for a possible reset * that is occurring during a download package operation. */ - for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT + - ICE_PF_RESET_WAIT_COUNT; cnt++) { + reset_wait_cnt = ICE_PF_RESET_WAIT_COUNT; + cfg_lock_timeout = ICE_GLOBAL_CFG_LOCK_TIMEOUT; + + for (cnt = 0; cnt < cfg_lock_timeout + reset_wait_cnt; cnt++) { reg = rd32(hw, PFGEN_CTRL); if (!(reg & PFGEN_CTRL_PFSWR_M)) break; @@ -1299,7 +1235,7 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw) ice_msec_delay(1, true); } - if (cnt == ICE_PF_RESET_WAIT_COUNT) { + if (cnt == cfg_lock_timeout + reset_wait_cnt) { ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n"); return ICE_ERR_RESET_FAILED; } @@ -2452,6 +2388,11 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, true : false; ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix, caps->nvm_unified_update); + caps->netlist_auth = + (number & ICE_NVM_MGMT_NETLIST_AUTH_SUPPORT) ? + true : false; + ice_debug(hw, ICE_DBG_INIT, "%s: netlist_auth = %d\n", prefix, + caps->netlist_auth); break; case ICE_AQC_CAPS_CEM: caps->mgmt_cem = (number == 1); @@ -2534,6 +2475,8 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, (phys_id & ICE_EXT_TOPO_DEV_IMG_LOAD_EN) != 0; caps->ext_topo_dev_img_prog_en[index] = (phys_id & ICE_EXT_TOPO_DEV_IMG_PROG_EN) != 0; + caps->ext_topo_dev_img_ver_schema[index] = + (phys_id & ICE_EXT_TOPO_DEV_IMG_VER_SCHEMA) != 0; ice_debug(hw, ICE_DBG_INIT, "%s: ext_topo_dev_img_ver_high[%d] = %d\n", prefix, index, @@ -2554,6 +2497,10 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, "%s: ext_topo_dev_img_prog_en[%d] = %d\n", prefix, index, caps->ext_topo_dev_img_prog_en[index]); + ice_debug(hw, ICE_DBG_INIT, + "%s: ext_topo_dev_img_ver_schema[%d] = %d\n", + prefix, index, + caps->ext_topo_dev_img_ver_schema[index]); break; } case ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE: @@ -2564,6 +2511,11 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, ice_debug(hw, ICE_DBG_INIT, "%s: dyn_flattening_en = %d\n", prefix, caps->dyn_flattening_en); break; + case ICE_AQC_CAPS_OROM_RECOVERY_UPDATE: + caps->orom_recovery_update = (number == 1); + ice_debug(hw, ICE_DBG_INIT, "%s: orom_recovery_update = %d\n", + prefix, caps->orom_recovery_update); + break; default: /* Not one of the recognized common capabilities */ found = false; @@ -2782,6 +2734,26 @@ ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, dev_p->nac_topo.id); } +/** + * ice_parse_sensor_reading_cap - Parse ICE_AQC_CAPS_SENSOR_READING cap + * @hw: pointer to the HW struct + * @dev_p: pointer to device capabilities structure + * @cap: capability element to parse + * + * Parse ICE_AQC_CAPS_SENSOR_READING for device capability for reading + * enabled sensors. + */ +static void +ice_parse_sensor_reading_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, + struct ice_aqc_list_caps_elem *cap) +{ + dev_p->supported_sensors = LE32_TO_CPU(cap->number); + + ice_debug(hw, ICE_DBG_INIT, + "dev caps: supported sensors (bitmap) = 0x%x\n", + dev_p->supported_sensors); +} + /** * ice_parse_dev_caps - Parse device capabilities * @hw: pointer to the HW struct @@ -2827,6 +2799,9 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, case ICE_AQC_CAPS_NAC_TOPOLOGY: ice_parse_nac_topo_dev_caps(hw, dev_p, &cap_resp[i]); break; + case ICE_AQC_CAPS_SENSOR_READING: + ice_parse_sensor_reading_cap(hw, dev_p, &cap_resp[i]); + break; default: /* Don't list common capabilities as unknown */ if (!found) @@ -3776,8 +3751,10 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, break; case ICE_FEC_DIS_AUTO: /* Set No FEC and auto FEC */ - if (!ice_fw_supports_fec_dis_auto(hw)) - return ICE_ERR_NOT_SUPPORTED; + if (!ice_fw_supports_fec_dis_auto(hw)) { + status = ICE_ERR_NOT_SUPPORTED; + goto out; + } cfg->link_fec_opt |= ICE_AQC_PHY_FEC_DIS; /* fall-through */ case ICE_FEC_AUTO: @@ -3852,6 +3829,7 @@ enum ice_status ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link, struct ice_sq_cd *cd) { + enum ice_status status = ICE_ERR_AQ_ERROR; struct ice_aqc_restart_an *cmd; struct ice_aq_desc desc; @@ -3866,7 +3844,16 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link, else cmd->cmd_flags &= ~ICE_AQC_RESTART_AN_LINK_ENABLE; - return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); + status = ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); + if (status) + return status; + + if (ena_link) + pi->phy.curr_user_phy_cfg.caps |= ICE_AQC_PHY_EN_LINK; + else + pi->phy.curr_user_phy_cfg.caps &= ~ICE_AQC_PHY_EN_LINK; + + return ICE_SUCCESS; } /** @@ -4062,6 +4049,51 @@ ice_aq_read_topo_dev_nvm(struct ice_hw *hw, return ICE_SUCCESS; } +static u16 ice_lut_type_to_size(u16 lut_type) +{ + switch (lut_type) { + case ICE_LUT_VSI: + return ICE_LUT_VSI_SIZE; + case ICE_LUT_GLOBAL: + return ICE_LUT_GLOBAL_SIZE; + case ICE_LUT_PF: + return ICE_LUT_PF_SIZE; + default: + return 0; + } +} + +static u16 ice_lut_size_to_flag(u16 lut_size) +{ + u16 f = 0; + + switch (lut_size) { + case ICE_LUT_GLOBAL_SIZE: + f = ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512_FLAG; + break; + case ICE_LUT_PF_SIZE: + f = ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K_FLAG; + break; + default: + break; + } + return f << ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S; +} + +int ice_lut_size_to_type(int lut_size) +{ + switch (lut_size) { + case ICE_LUT_VSI_SIZE: + return ICE_LUT_VSI; + case ICE_LUT_GLOBAL_SIZE: + return ICE_LUT_GLOBAL; + case ICE_LUT_PF_SIZE: + return ICE_LUT_PF; + default: + return -1; + } +} + /** * __ice_aq_get_set_rss_lut * @hw: pointer to the hardware structure @@ -4073,7 +4105,7 @@ ice_aq_read_topo_dev_nvm(struct ice_hw *hw, static enum ice_status __ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *params, bool set) { - u16 flags = 0, vsi_id, lut_type, lut_size, glob_lut_idx, vsi_handle; + u16 flags, vsi_id, lut_type, lut_size, glob_lut_idx = 0, vsi_handle; struct ice_aqc_get_set_rss_lut *cmd_resp; struct ice_aq_desc desc; enum ice_status status; @@ -4084,16 +4116,22 @@ __ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params vsi_handle = params->vsi_handle; lut = params->lut; + lut_type = params->lut_type; + lut_size = ice_lut_type_to_size(lut_type); + cmd_resp = &desc.params.get_set_rss_lut; + if (lut_type == ICE_LUT_GLOBAL) + glob_lut_idx = params->global_lut_id; - if (!ice_is_vsi_valid(hw, vsi_handle) || !lut) + if (!lut || !lut_size || !ice_is_vsi_valid(hw, vsi_handle)) return ICE_ERR_PARAM; - lut_size = params->lut_size; - lut_type = params->lut_type; - glob_lut_idx = params->global_lut_id; - vsi_id = ice_get_hw_vsi_num(hw, vsi_handle); + if (lut_size > params->lut_size) + return ICE_ERR_INVAL_SIZE; - cmd_resp = &desc.params.get_set_rss_lut; + if (set && lut_size != params->lut_size) + return ICE_ERR_PARAM; + + vsi_id = ice_get_hw_vsi_num(hw, vsi_handle); if (set) { ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_rss_lut); @@ -4107,61 +4145,15 @@ __ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params ICE_AQC_GSET_RSS_LUT_VSI_ID_M) | ICE_AQC_GSET_RSS_LUT_VSI_VALID); - switch (lut_type) { - case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI: - case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF: - case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL: - flags |= ((lut_type << ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S) & - ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M); - break; - default: - status = ICE_ERR_PARAM; - goto ice_aq_get_set_rss_lut_exit; - } - - if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL) { - flags |= ((glob_lut_idx << ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_S) & - ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_M); + flags = ice_lut_size_to_flag(lut_size) | + ((lut_type << ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S) & + ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M) | + ((glob_lut_idx << ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_S) & + ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_M); - if (!set) - goto ice_aq_get_set_rss_lut_send; - } else if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) { - if (!set) - goto ice_aq_get_set_rss_lut_send; - } else { - goto ice_aq_get_set_rss_lut_send; - } - - /* LUT size is only valid for Global and PF table types */ - switch (lut_size) { - case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128: - flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128_FLAG << - ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) & - ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M; - break; - case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512: - flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512_FLAG << - ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) & - ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M; - break; - case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K: - if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) { - flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K_FLAG << - ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) & - ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M; - break; - } - /* fall-through */ - default: - status = ICE_ERR_PARAM; - goto ice_aq_get_set_rss_lut_exit; - } - -ice_aq_get_set_rss_lut_send: cmd_resp->flags = CPU_TO_LE16(flags); status = ice_aq_send_cmd(hw, &desc, lut, lut_size, NULL); - -ice_aq_get_set_rss_lut_exit: + params->lut_size = LE16_TO_CPU(desc.datalen); return status; } @@ -5155,7 +5147,7 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle, q_ctx->q_teid = LE32_TO_CPU(node.node_teid); /* add a leaf node into scheduler tree queue layer */ - status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node); + status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node, NULL); if (!status) status = ice_sched_replay_q_bw(pi, q_ctx); @@ -5390,7 +5382,7 @@ ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc, for (i = 0; i < num_qsets; i++) { node.node_teid = buf->rdma_qsets[i].qset_teid; status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, - &node); + &node, NULL); *** 3424 LINES SKIPPED ***
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