From owner-freebsd-arm@FreeBSD.ORG Tue Dec 11 19:03:10 2012 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 407C3D2 for ; Tue, 11 Dec 2012 19:03:10 +0000 (UTC) (envelope-from freebsd@damnhippie.dyndns.org) Received: from duck.symmetricom.us (duck.symmetricom.us [206.168.13.214]) by mx1.freebsd.org (Postfix) with ESMTP id 5374D8FC0C for ; Tue, 11 Dec 2012 19:03:08 +0000 (UTC) Received: from damnhippie.dyndns.org (daffy.symmetricom.us [206.168.13.218]) by duck.symmetricom.us (8.14.5/8.14.5) with ESMTP id qBBF1CST088868 for ; Tue, 11 Dec 2012 08:01:13 -0700 (MST) (envelope-from freebsd@damnhippie.dyndns.org) Received: from [172.22.42.240] (revolution.hippie.lan [172.22.42.240]) by damnhippie.dyndns.org (8.14.3/8.14.3) with ESMTP id qBBF19Dq055587; Tue, 11 Dec 2012 08:01:09 -0700 (MST) (envelope-from freebsd@damnhippie.dyndns.org) Subject: Re: interrupt storm on Dreamplug for interrupts 12 and 16 From: Ian Lepore To: Matthieu Kraus In-Reply-To: <20121211144536.70434wqonm247mdc@mail.tu-chemnitz.de> References: <20121211144536.70434wqonm247mdc@mail.tu-chemnitz.de> Content-Type: multipart/mixed; boundary="=-e0TG0Hb/8sJDKnXmaIex" Date: Tue, 11 Dec 2012 08:01:08 -0700 Message-ID: <1355238068.87661.408.camel@revolution.hippie.lan> Mime-Version: 1.0 X-Mailer: Evolution 2.32.1 FreeBSD GNOME Team Port Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Dec 2012 19:03:10 -0000 --=-e0TG0Hb/8sJDKnXmaIex Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit On Tue, 2012-12-11 at 14:45 +0100, Matthieu Kraus wrote: > Greetings, > > I tried updating my kernel on my Dreamplug yesterday (been running > r228127 so far which worked quite well), however I'm running into > issues with the ethernet controllers after the update - namely I'm > constantly getting interrupt storms on interrupts 12 and 16 which > belong to mge0 and mge1 respecively rendering non-functional. > > does anyone have some pointers what may cause it? > > the diff I'm running with (old kernel used the same besides the USB > option to fix the CAM issues) is attached: > > the patch for if_mge is pretty old and grabbed from this ML and helps > against some awful watchdog timeouts I encountered very often, the one > for cpuvar.h allows to build zfs (I have an external RAID controller > attached via esata on which my zfs pool resides) > > the dts is mostly based off an ultimate-rd one with some adjustments > based off the settings linux uses Here are the dts files I've been using for the NOR (1001) and NAND (1001N) models of dreamplug; they look a bit different than yours. Also, I've got no patches in the mge driver these days, but I do live with the fact that I have to have cables plugged into both ports or there are annoyingly-long timeouts trying to DHCP at boot time. In fact, the only patches I'm using for dreamplug are the attached dts, and personal kernel config choices, plus the one I posted about a week ago to leave the cache allocate-on-write feature set the way the bootloader set it. I'm currently running -current @r243920 on dreamplug. -- Ian --=-e0TG0Hb/8sJDKnXmaIex Content-Disposition: attachment; filename="dreamplug_dts.diff" Content-Type: text/x-patch; name="dreamplug_dts.diff"; charset="us-ascii" Content-Transfer-Encoding: 7bit diff -r b3c4270c3840 -r fc76ae13d76c sys/boot/fdt/dts/dreamplug-1001.dts --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ sys/boot/fdt/dts/dreamplug-1001.dts Sun Aug 19 11:01:08 2012 -0600 @@ -0,0 +1,318 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * GlobalScale Technologies DreamPlug Device Tree Source. + * + * This source is for version 10 revision 01 units with NOR SPI flash. + * These units are marked "1001" on the serial number label. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "GlobalScale Technologies Dreamplug v1001"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + mpp = &MPP; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + + }; + + memory { + device_type = "memory"; + reg = <0x0 0x20000000>; // 512M at 0x0 + }; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <1>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x1e 0xfa000000 0x00100000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + }; + }; + + SOC: soc88f6281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 2 /* MPP[ 0]: SPI_SCn */ + 1 2 /* MPP[ 1]: SPI_MOSI */ + 2 2 /* MPP[ 2]: SPI_SCK */ + 3 2 /* MPP[ 3]: SPI_MISO */ + 4 1 /* MPP[ 4]: NF_IO[6] */ + 5 1 /* MPP[ 5]: NF_IO[7] */ + 6 1 /* MPP[ 6]: SYSRST_OUTn */ + 7 0 /* MPP[ 7]: GPO[7] */ + 8 1 /* MPP[ 8]: TW_SDA */ + 9 1 /* MPP[ 9]: TW_SCK */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: US0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 20 3 /* MPP[20]: GE1[ 0] */ + 21 3 /* MPP[21]: GE1[ 1] */ + 22 3 /* MPP[22]: GE1[ 2] */ + 23 3 /* MPP[23]: GE1[ 3] */ + 24 3 /* MPP[24]: GE1[ 4] */ + 25 3 /* MPP[25]: GE1[ 5] */ + 26 3 /* MPP[26]: GE1[ 6] */ + 27 3 /* MPP[27]: GE1[ 7] */ + 28 3 /* MPP[28]: GE1[ 8] */ + 29 3 /* MPP[29]: GE1[ 9] */ + 30 3 /* MPP[30]: GE1[10] */ + 31 3 /* MPP[31]: GE1[11] */ + 32 3 /* MPP[32]: GE1[12] */ + 33 3 /* MPP[33]: GE1[13] */ + 34 3 /* MPP[34]: GE1[14] */ + 35 3 /* MPP[35]: GE1[15] */ + 36 0 /* MPP[36]: GPIO[36] */ + 37 0 /* MPP[37]: GPIO[37] */ + 38 0 /* MPP[38]: GPIO[38] */ + 39 0 /* MPP[39]: GPIO[39] */ + 40 2 /* MPP[40]: TDM_SPI_SCK */ + 41 2 /* MPP[41]: TDM_SPI_MISO */ + 42 2 /* MPP[42]: TDM_SPI_MOSI */ + 43 0 /* MPP[43]: GPIO[43] */ + 44 0 /* MPP[44]: GPIO[44] */ + 45 0 /* MPP[45]: GPIO[45] */ + 46 0 /* MPP[46]: GPIO[46] */ + 47 0 /* MPP[47]: GPIO[47] */ + 48 0 /* MPP[48]: GPIO[48] */ + 49 0 /* MPP[49]: GPIO[49] */ + >; + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + pin-count = <50>; + }; + + gpioled@0 { + compatible = "mrvl,gpioled"; + + gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */ + &GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */ + &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */ + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + }; + + enet1: ethernet@76000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x76000 0x02000>; + ranges = <0x0 0x76000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <16 17 18 15 47>; + interrupt-parent = <&PIC>; + phy-handle = <&phy1>; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x10000>; + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + + sata@80000 { + compatible = "mrvl,sata"; + reg = <0x80000 0x6000>; + interrupts = <21>; + interrupt-parent = <&PIC>; + }; + + sdio@90000 { + compatible = "mrvl,sdio"; + reg = <0x90000 0x134>; + interrupts = <28>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; + +}; diff -r b3c4270c3840 -r fc76ae13d76c sys/boot/fdt/dts/dreamplug-1001N.dts --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ sys/boot/fdt/dts/dreamplug-1001N.dts Sun Aug 19 11:01:08 2012 -0600 @@ -0,0 +1,339 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * GlobalScale Technologies DreamPlug Device Tree Source. + * + * This source is for version 10 revision 01 units with NAND flash. + * These units are marked "1001N" on the serial number label. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "GlobalScale Technologies Dreamplug v1001N"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + mpp = &MPP; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + + }; + + memory { + device_type = "memory"; + reg = <0x0 0x20000000>; // 512M at 0x0 + }; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <1>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x2f 0xf9300000 0x00100000>; + + nand@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mrvl,nfc"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + + // Slice info reported by builtin linux when it boots... + //[ 11.161328] 0x00000000-0x00100000 : "u-boot" + //[ 11.167431] 0x00100000-0x00500000 : "uImage" + //[ 11.173471] 0x00500000-0x20000000 : "root" + + slice@0 { + reg = <0x0 0x100000>; + label = "u-boot"; + read-only; + }; + + slice@200000 { + reg = <0x100000 0x40000>; + label = "uImage"; + }; + + slice@500000 { + reg = <0x500000 0x1FB00000>; + label = "root"; + }; + }; + }; + + SOC: soc88f6281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 1 /* MPP[ 0]: NF_IO[2] */ + 1 1 /* MPP[ 1]: NF_IO[3] */ + 2 1 /* MPP[ 2]: NF_IO[4] */ + 3 1 /* MPP[ 3]: NF_IO[5] */ + 4 1 /* MPP[ 4]: NF_IO[6] */ + 5 1 /* MPP[ 5]: NF_IO[7] */ + 6 1 /* MPP[ 6]: SYSRST_OUTn */ + 7 0 /* MPP[ 7]: GPO[7] */ + 8 1 /* MPP[ 8]: TW_SDA */ + 9 1 /* MPP[ 9]: TW_SCK */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: US0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 20 3 /* MPP[20]: GE1[ 0] */ + 21 3 /* MPP[21]: GE1[ 1] */ + 22 3 /* MPP[22]: GE1[ 2] */ + 23 3 /* MPP[23]: GE1[ 3] */ + 24 3 /* MPP[24]: GE1[ 4] */ + 25 3 /* MPP[25]: GE1[ 5] */ + 26 3 /* MPP[26]: GE1[ 6] */ + 27 3 /* MPP[27]: GE1[ 7] */ + 28 3 /* MPP[28]: GE1[ 8] */ + 29 3 /* MPP[29]: GE1[ 9] */ + 30 3 /* MPP[30]: GE1[10] */ + 31 3 /* MPP[31]: GE1[11] */ + 32 3 /* MPP[32]: GE1[12] */ + 33 3 /* MPP[33]: GE1[13] */ + 34 3 /* MPP[34]: GE1[14] */ + 35 3 /* MPP[35]: GE1[15] */ + 36 0 /* MPP[36]: GPIO[36] */ + 37 0 /* MPP[37]: GPIO[37] */ + 38 0 /* MPP[38]: GPIO[38] */ + 39 0 /* MPP[39]: GPIO[39] */ + 40 2 /* MPP[40]: TDM_SPI_SCK */ + 41 2 /* MPP[41]: TDM_SPI_MISO */ + 42 2 /* MPP[42]: TDM_SPI_MOSI */ + 43 0 /* MPP[43]: GPIO[43] */ + 44 0 /* MPP[44]: GPIO[44] */ + 45 0 /* MPP[45]: GPIO[45] */ + 46 0 /* MPP[46]: GPIO[46] */ + 47 0 /* MPP[47]: GPIO[47] */ + 48 0 /* MPP[48]: GPIO[48] */ + 49 0 /* MPP[49]: GPIO[49] */ + >; + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + pin-count = <50>; + }; + + gpioled@0 { + compatible = "mrvl,gpioled"; + + gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */ + &GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */ + &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */ + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + }; + + enet1: ethernet@76000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x76000 0x02000>; + ranges = <0x0 0x76000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <16 17 18 15 47>; + interrupt-parent = <&PIC>; + phy-handle = <&phy1>; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x10000>; + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + + sata@80000 { + compatible = "mrvl,sata"; + reg = <0x80000 0x6000>; + interrupts = <21>; + interrupt-parent = <&PIC>; + }; + + sdio@90000 { + compatible = "mrvl,sdio"; + reg = <0x90000 0x134>; + interrupts = <28>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; + +}; --=-e0TG0Hb/8sJDKnXmaIex--