From owner-svn-src-head@FreeBSD.ORG Sat Feb 7 12:50:34 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id DAE36364; Sat, 7 Feb 2015 12:50:34 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BAFD3405; Sat, 7 Feb 2015 12:50:34 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t17CoYVP076537; Sat, 7 Feb 2015 12:50:34 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t17CoY49076516; Sat, 7 Feb 2015 12:50:34 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201502071250.t17CoY49076516@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 7 Feb 2015 12:50:34 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r278349 - head/contrib/llvm/lib/Target/X86 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 07 Feb 2015 12:50:35 -0000 Author: dim Date: Sat Feb 7 12:50:33 2015 New Revision: 278349 URL: https://svnweb.freebsd.org/changeset/base/278349 Log: Pull in r224884 from upstream llvm trunk (by Keno Fischer): [FastIsel][X86] Fix invalid register replacement for bool args Summary: Consider the following IR: %3 = load i8* undef %4 = trunc i8 %3 to i1 %5 = call %jl_value_t.0* @foo(..., i1 %4, ...) ret %jl_value_t.0* %5 Bools (that are the result of direct truncs) are lowered as whatever the argument to the trunc was and a "and 1", causing the part of the MBB responsible for this argument to look something like this: %vreg8 = AND8ri %vreg7, 1, %EFLAGS; GR8:%vreg8,%vreg7 Later, when the load is lowered, it will insert %vreg15 = MOV8rm %vreg14, 1, %noreg, 0, %noreg; mem:LD1[undef] GR8:%vreg15 GR64:%vreg14 but remember to (at the end of isel) replace vreg7 by vreg15. Now for the bug. In fast isel lowering, we mistakenly mark vreg8 as the result of the load instead of the trunc. This adds a fixup to have vreg8 replaced by whatever the result of the load is as well, so we end up with %vreg15 = AND8ri %vreg15, 1, %EFLAGS; GR8:%vreg15 which is an SSA violation and causes problems later down the road. This fixes PR21557. Test Plan: Test test case from PR21557 is added to the test suite. Reviewers: ributzka Reviewed By: ributzka Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6245 This fixes a possible assertion failure when compiling toolbox.cxx from LibreOffice 4.3.5. Reported by: kwm Modified: head/contrib/llvm/lib/Target/X86/X86FastISel.cpp Modified: head/contrib/llvm/lib/Target/X86/X86FastISel.cpp ============================================================================== --- head/contrib/llvm/lib/Target/X86/X86FastISel.cpp Sat Feb 7 12:20:33 2015 (r278348) +++ head/contrib/llvm/lib/Target/X86/X86FastISel.cpp Sat Feb 7 12:50:33 2015 (r278349) @@ -2699,6 +2699,9 @@ bool X86FastISel::FastLowerCall(CallLowe TM.Options.GuaranteedTailCallOpt)) return false; + SmallVector OutVTs; + SmallVector ArgRegs; + // If this is a constant i1/i8/i16 argument, promote to i32 to avoid an extra // instruction. This is safe because it is common to all FastISel supported // calling conventions on x86. @@ -2716,28 +2719,34 @@ bool X86FastISel::FastLowerCall(CallLowe // Passing bools around ends up doing a trunc to i1 and passing it. // Codegen this as an argument + "and 1". - if (auto *TI = dyn_cast(Val)) { - if (TI->getType()->isIntegerTy(1) && CLI.CS && - (TI->getParent() == CLI.CS->getInstruction()->getParent()) && - TI->hasOneUse()) { - Val = cast(Val)->getOperand(0); - unsigned ResultReg = getRegForValue(Val); + MVT VT; + auto *TI = dyn_cast(Val); + unsigned ResultReg; + if (TI && TI->getType()->isIntegerTy(1) && CLI.CS && + (TI->getParent() == CLI.CS->getInstruction()->getParent()) && + TI->hasOneUse()) { + Value *PrevVal = TI->getOperand(0); + ResultReg = getRegForValue(PrevVal); + + if (!ResultReg) + return false; - if (!ResultReg) - return false; + if (!isTypeLegal(PrevVal->getType(), VT)) + return false; - MVT ArgVT; - if (!isTypeLegal(Val->getType(), ArgVT)) - return false; + ResultReg = + FastEmit_ri(VT, VT, ISD::AND, ResultReg, hasTrivialKill(PrevVal), 1); - ResultReg = - FastEmit_ri(ArgVT, ArgVT, ISD::AND, ResultReg, Val->hasOneUse(), 1); - - if (!ResultReg) - return false; - UpdateValueMap(Val, ResultReg); - } + if (!ResultReg) + return false; + } else { + if (!isTypeLegal(Val->getType(), VT)) + return false; + ResultReg = getRegForValue(Val); } + + ArgRegs.push_back(ResultReg); + OutVTs.push_back(VT); } // Analyze operands of the call, assigning locations to each operand. @@ -2749,13 +2758,6 @@ bool X86FastISel::FastLowerCall(CallLowe if (IsWin64) CCInfo.AllocateStack(32, 8); - SmallVector OutVTs; - for (auto *Val : OutVals) { - MVT VT; - if (!isTypeLegal(Val->getType(), VT)) - return false; - OutVTs.push_back(VT); - } CCInfo.AnalyzeCallOperands(OutVTs, OutFlags, CC_X86); // Get a count of how many bytes are to be pushed on the stack. @@ -2777,9 +2779,7 @@ bool X86FastISel::FastLowerCall(CallLowe if (ArgVT == MVT::x86mmx) return false; - unsigned ArgReg = getRegForValue(ArgVal); - if (!ArgReg) - return false; + unsigned ArgReg = ArgRegs[VA.getValNo()]; // Promote the value if needed. switch (VA.getLocInfo()) {