Date: Fri, 1 Sep 2023 10:07:12 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 8b143276ae49 - main - gicv3: Support indirect ITS tables Message-ID: <202309011007.381A7CXv092347@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=8b143276ae493c8f060159643d9d9cdc149e294a commit 8b143276ae493c8f060159643d9d9cdc149e294a Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2023-08-22 16:01:21 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2023-09-01 09:56:17 +0000 gicv3: Support indirect ITS tables The GICv3 ITS device supports two options for device tables. Currently we support a single table to hold all device IDs, however when the device ID space grows large this can be too large for the GITS_BASER register to describe. To handle this case, and to reduce the memory needed when this space is sparse support the second option, the indirect table. The indirect table is a 2 level table where the first level contains the physical address of the second with a valid bit. The second level is an ITS page sized table where each entry is the original entry size. As we don't need to allocate a second level table for devices IDs that don't exist this can reduce the allocation size. Reviewed by: gallatin Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D41555 --- sys/arm64/arm64/gic_v3_reg.h | 3 ++ sys/arm64/arm64/gicv3_its.c | 96 ++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 95 insertions(+), 4 deletions(-) diff --git a/sys/arm64/arm64/gic_v3_reg.h b/sys/arm64/arm64/gic_v3_reg.h index 6a766be3da2a..16b1cd438350 100644 --- a/sys/arm64/arm64/gic_v3_reg.h +++ b/sys/arm64/arm64/gic_v3_reg.h @@ -417,6 +417,8 @@ #define GITS_BASER_SIZE_MASK 0xFFUL #define GITS_BASER_NUM 8 +/* Size of entries in a level 1 indirect table */ +#define GITS_INDIRECT_L1_ESIZE 8 #define GITS_TYPER (0x0008) #define GITS_TYPER_HCC_SHIFT 24 @@ -433,6 +435,7 @@ ((((x) & GITS_TYPER_ITTES_MASK) >> GITS_TYPER_ITTES_SHIFT) + 1) #define GITS_TRANSLATER (0x10040) + /* * LPI related */ diff --git a/sys/arm64/arm64/gicv3_its.c b/sys/arm64/arm64/gicv3_its.c index cb655eaca412..a126a166c4c9 100644 --- a/sys/arm64/arm64/gicv3_its.c +++ b/sys/arm64/arm64/gicv3_its.c @@ -1,5 +1,6 @@ /*- * Copyright (c) 2015-2016 The FreeBSD Foundation + * Copyright (c) 2023 Arm Ltd * * This software was developed by Andrew Turner under * the sponsorship of the FreeBSD Foundation. @@ -221,10 +222,16 @@ struct its_cmd { /* An ITS private table */ struct its_ptable { vm_offset_t ptab_vaddr; - /* Size of the L1 table */ + /* Size of the L1 and L2 tables */ size_t ptab_l1_size; - /* Number of L1 entries */ + size_t ptab_l2_size; + /* Number of L1 and L2 entries */ int ptab_l1_nidents; + int ptab_l2_nidents; + + int ptab_page_size; + int ptab_share; + bool ptab_indirect; }; /* ITS collection description. */ @@ -475,6 +482,23 @@ gicv3_its_table_page_size(struct gicv3_its_softc *sc, int table) } } +static bool +gicv3_its_table_supports_indirect(struct gicv3_its_softc *sc, int table) +{ + uint64_t reg; + + reg = gic_its_read_8(sc, GITS_BASER(table)); + + /* Try setting the indirect flag */ + reg |= GITS_BASER_INDIRECT; + gic_its_write_8(sc, GITS_BASER(table), reg); + + /* Read back to check */ + reg = gic_its_read_8(sc, GITS_BASER(table)); + return ((reg & GITS_BASER_INDIRECT) != 0); +} + + static int gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc) { @@ -482,9 +506,10 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc) vm_paddr_t paddr; uint64_t cache, reg, share, tmp, type; size_t its_tbl_size, nitspages, npages; - size_t l1_esize, l1_nidents; + size_t l1_esize, l2_esize, l1_nidents, l2_nidents; int i, page_size; int devbits; + bool indirect; if ((sc->sc_its_flags & ITS_FLAGS_ERRATA_CAVIUM_22375) != 0) { /* @@ -532,6 +557,9 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc) return (EINVAL); } + indirect = false; + l2_nidents = 0; + l2_esize = 0; switch(type) { case GITS_BASER_TYPE_DEV: if (sc->sc_dev_table_idx != -1) @@ -540,6 +568,23 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc) sc->sc_dev_table_idx = i; l1_nidents = (1 << devbits); + if ((l1_esize * l1_nidents) > (page_size * 2)) { + indirect = + gicv3_its_table_supports_indirect(sc, i); + if (indirect) { + /* + * Each l1 entry is 8 bytes and points + * to an l2 table of size page_size. + * Calculate how many entries this is + * and use this to find how many + * 8 byte l1 idents we need. + */ + l2_esize = l1_esize; + l2_nidents = page_size / l2_esize; + l1_nidents = l1_nidents / l2_nidents; + l1_esize = GITS_INDIRECT_L1_ESIZE; + } + } its_tbl_size = l1_esize * l1_nidents; its_tbl_size = roundup2(its_tbl_size, page_size); break; @@ -564,6 +609,11 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc) sc->sc_its_ptab[i].ptab_vaddr = table; sc->sc_its_ptab[i].ptab_l1_size = its_tbl_size; sc->sc_its_ptab[i].ptab_l1_nidents = l1_nidents; + sc->sc_its_ptab[i].ptab_l2_size = page_size; + sc->sc_its_ptab[i].ptab_l2_nidents = l2_nidents; + + sc->sc_its_ptab[i].ptab_indirect = indirect; + sc->sc_its_ptab[i].ptab_page_size = page_size; paddr = vtophys(table); @@ -578,6 +628,7 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc) GITS_BASER_SIZE_MASK); /* Set the new values */ reg |= GITS_BASER_VALID | + (indirect ? GITS_BASER_INDIRECT : 0) | (cache << GITS_BASER_CACHE_SHIFT) | (type << GITS_BASER_TYPE_SHIFT) | paddr | (share << GITS_BASER_SHARE_SHIFT) | @@ -618,6 +669,7 @@ gicv3_its_table_init(device_t dev, struct gicv3_its_softc *sc) return (ENXIO); } + sc->sc_its_ptab[i].ptab_share = share; /* We should have made all needed changes */ break; } @@ -1218,6 +1270,10 @@ static bool its_device_alloc(struct gicv3_its_softc *sc, int devid) { struct its_ptable *ptable; + vm_offset_t l2_table; + uint64_t *table; + uint32_t index; + bool shareable; /* No device table */ if (sc->sc_dev_table_idx < 0) { @@ -1228,7 +1284,39 @@ its_device_alloc(struct gicv3_its_softc *sc, int devid) ptable = &sc->sc_its_ptab[sc->sc_dev_table_idx]; /* Check the devid is within the table limit */ - return (devid < ptable->ptab_l1_nidents); + if (!ptable->ptab_indirect) { + return (devid < ptable->ptab_l1_nidents); + } + + /* Check the devid is within the allocated range */ + index = devid / ptable->ptab_l2_nidents; + if (index >= ptable->ptab_l1_nidents) + return (false); + + table = (uint64_t *)ptable->ptab_vaddr; + /* We have an second level table */ + if ((table[index] & GITS_BASER_VALID) != 0) + return (true); + + shareable = true; + if ((ptable->ptab_share & GITS_BASER_SHARE_MASK) == GITS_BASER_SHARE_NS) + shareable = false; + + l2_table = (vm_offset_t)contigmalloc_domainset(ptable->ptab_l2_size, + M_GICV3_ITS, sc->sc_ds, M_WAITOK | M_ZERO, 0, (1ul << 48) - 1, + ptable->ptab_page_size, 0); + + if (!shareable) + cpu_dcache_wb_range((vm_offset_t)l2_table, + ptable->ptab_l2_size); + + table[index] = vtophys(l2_table) | GITS_BASER_VALID; + if (!shareable) + cpu_dcache_wb_range((vm_offset_t)&table[index], + sizeof(table[index])); + + dsb(sy); + return (true); } static struct its_dev *
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