Date: Fri, 4 Mar 2011 22:59:14 +0000 (UTC) From: Jung-uk Kim <jkim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r219277 - stable/8/sys/x86/cpufreq Message-ID: <201103042259.p24MxERW067105@svn.freebsd.org>
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Author: jkim Date: Fri Mar 4 22:59:14 2011 New Revision: 219277 URL: http://svn.freebsd.org/changeset/base/219277 Log: MFC: r219046 Set C1 "I/O then Halt" capability bit for Intel EIST. Some broken BIOSes refuse to load external SSDTs if this bit is unset for _PDC. Modified: stable/8/sys/x86/cpufreq/est.c Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) Modified: stable/8/sys/x86/cpufreq/est.c ============================================================================== --- stable/8/sys/x86/cpufreq/est.c Fri Mar 4 22:26:41 2011 (r219276) +++ stable/8/sys/x86/cpufreq/est.c Fri Mar 4 22:59:14 2011 (r219277) @@ -945,8 +945,11 @@ static int est_features(driver_t *driver, u_int *features) { - /* Notify the ACPI CPU that we support direct access to MSRs */ - *features = ACPI_CAP_PERF_MSRS; + /* + * Notify the ACPI CPU that we support direct access to MSRs. + * XXX C1 "I/O then Halt" seems necessary for some broken BIOS. + */ + *features = ACPI_CAP_PERF_MSRS | ACPI_CAP_C1_IO_HALT; return (0); }
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