Date: Thu, 5 Jan 2006 10:47:24 +0900 (JST) From: HATANOU Tomomi <hatanou@infolab.ne.jp> To: FreeBSD-gnats-submit@FreeBSD.org Subject: i386/91328: L2/L3 cache of some IA32 CPUs not properly recognized. Message-ID: <200601050147.k051lOpZ000865@ryoko.infolab.ne.jp> Resent-Message-ID: <200601050150.k051o6PA059847@freefall.freebsd.org>
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>Number: 91328
>Category: i386
>Synopsis: L2/L3 cache of some IA32 CPUs not properly recognized.
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: freebsd-i386
>State: open
>Quarter:
>Keywords:
>Date-Required:
>Class: sw-bug
>Submitter-Id: current-users
>Arrival-Date: Thu Jan 05 01:50:06 GMT 2006
>Closed-Date:
>Last-Modified:
>Originator: HATANOU Tomomi
>Release: FreeBSD 7.0-CURRENT i386
>Organization:
>Environment:
System: FreeBSD ryoko.infolab.ne.jp 7.0-CURRENT FreeBSD 7.0-CURRENT #13: Thu Jan 5 09:51:40 JST 2006 hatanou@ryoko.infolab.ne.jp:/usr/local/obj/usr/src/sys/CF-R3E i386
Machine:
1) Panasonic CF-R3E (Pentium-M 733 based micro notebook)
2) ASUS P2B-D with 2 x 700MHz Pentium-III
>Description:
As far as I know,
1) Pentium-M 733 (dothan core, ULV)
L2 cache is not recognized.
2) Pentium-III w/ 256k L2
L2 cache size is wrongly recognized as 128k.
>How-To-Repeat:
Boot verbosely, or view vm.stats.pagequeue.* sysctl variables.
>Fix:
Apply this patch to src/sys/i386/i386/identput.c
--- /sys/i386/i386/identcpu.c.orig Tue Jan 3 23:43:38 2006
+++ /sys/i386/i386/identcpu.c Thu Jan 5 10:33:46 2006
@@ -1344,6 +1344,12 @@
case 0x45:
printf("\n2nd-level cache: 2-MB, 4-way set associative, 32 byte line size");
break;
+ case 0x46:
+ printf("\n3rd-level cache: 4-MB, 4-way set associative, 64 byte line size");
+ break;
+ case 0x47:
+ printf("\n3rd-level cache: 8-MB, 8-way set associative, 64 byte line size");
+ break;
case 0x50:
printf("\nInstruction TLB: 4-KB, 2-MB or 4-MB pages, fully associative, 64 entries");
break;
@@ -1383,6 +1389,9 @@
case 0x72:
printf("\nTrace cache: 32K-uops, 8-way set associative");
break;
+ case 0x78:
+ printf("\n2nd-level cache: 1-MB, 4-way set associative, 64-byte line size");
+ break;
case 0x79:
printf("\n2nd-level cache: 128-KB, 8-way set associative, sectored cache, 64-byte line size");
break;
@@ -1395,6 +1404,12 @@
case 0x7c:
printf("\n2nd-level cache: 1-MB, 8-way set associative, sectored cache, 64-byte line size");
break;
+ case 0x7d:
+ printf("\n2nd-level cache: 2-MB, 8-way set associative, 64-byte line size");
+ break;
+ case 0x7f:
+ printf("\n2nd-level cache: 512-KB, 2-way set associative, 64-byte line size");
+ break;
case 0x82:
printf("\n2nd-level cache: 256-KB, 8-way set associative, 32 byte line size");
break;
@@ -1591,6 +1606,30 @@
*ways = 4;
}
break;
+ case 0x46:
+ /* 3rd-level cache: 4-MB, 4-way set associative,
+ * 64 byte line size */
+ if (*size < 4096) {
+ *size = 4096;
+ *ways = 4;
+ }
+ break;
+ case 0x47:
+ /* 3rd-level cache: 8-MB, 8-way set associative,
+ * 64 byte line size */
+ if (*size < 8192) {
+ *size = 8192;
+ *ways = 8;
+ }
+ break;
+ case 0x78:
+ /* 2nd-level cache: 1-MB, 4-way set associative,
+ * 64-byte line size */
+ if (*size < 1024) {
+ *size = 1024;
+ *ways = 4;
+ }
+ break;
case 0x79:
/* 2nd-level cache: 128-KB, 8-way set associative,
* sectored cache, 64-byte line size */
@@ -1623,11 +1662,27 @@
*ways = 8;
}
break;
+ case 0x7d:
+ /* 2nd-level cache: 2-MB, 8-way set associative,
+ * 64-byte line size */
+ if (*size < 2048) {
+ *size = 2048;
+ *ways = 8;
+ }
+ break;
+ case 0x7f:
+ /* 2nd-level cache: 512-KB, 2-way set associative,
+ * 64-byte line size */
+ if (*size < 512) {
+ *size = 512;
+ *ways = 2;
+ }
+ break;
case 0x82:
/* 2nd-level cache: 256-KB, 8-way set associative,
* 32 byte line size */
- if (*size < 128) {
- *size = 128;
+ if (*size < 256) {
+ *size = 256;
*ways = 8;
}
break;
>Release-Note:
>Audit-Trail:
>Unformatted:
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