From owner-svn-src-head@FreeBSD.ORG Fri Nov 1 00:21:10 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id C52DF752; Fri, 1 Nov 2013 00:21:10 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id A38062E48; Fri, 1 Nov 2013 00:21:10 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rA10LAvV030824; Fri, 1 Nov 2013 00:21:10 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id rA10L94c030820; Fri, 1 Nov 2013 00:21:09 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201311010021.rA10L94c030820@svn.freebsd.org> From: Ian Lepore Date: Fri, 1 Nov 2013 00:21:09 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r257483 - head/sys/arm/freescale/imx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Nov 2013 00:21:10 -0000 Author: ian Date: Fri Nov 1 00:21:09 2013 New Revision: 257483 URL: http://svnweb.freebsd.org/changeset/base/257483 Log: Add the Soc- / machine-dependent parts of imx6 support. Added: head/sys/arm/freescale/imx/files.imx6 (contents, props changed) head/sys/arm/freescale/imx/imx6_machdep.c (contents, props changed) head/sys/arm/freescale/imx/imx6_pl310.c (contents, props changed) head/sys/arm/freescale/imx/std.imx6 (contents, props changed) Added: head/sys/arm/freescale/imx/files.imx6 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/freescale/imx/files.imx6 Fri Nov 1 00:21:09 2013 (r257483) @@ -0,0 +1,56 @@ +# $FreeBSD$ + +# +# Standard ARM support. +# +arm/arm/bus_space_asm_generic.S standard +arm/arm/bus_space_generic.c standard +arm/arm/cpufunc_asm_arm11.S standard +arm/arm/cpufunc_asm_armv5.S standard +arm/arm/cpufunc_asm_armv7.S standard +arm/arm/irq_dispatch.S standard +kern/kern_clocksource.c standard + +# +# Standard imx6 devices and support. +# +arm/arm/gic.c standard +arm/arm/pl310.c standard +arm/freescale/imx/bus_space.c standard +arm/freescale/imx/common.c standard +arm/freescale/imx/imx6_anatop.c standard +arm/freescale/imx/imx6_ccm.c standard +arm/freescale/imx/imx6_machdep.c standard +arm/freescale/imx/imx6_pl310.c standard +arm/freescale/imx/imx_machdep.c standard +arm/freescale/imx/imx_gpt.c standard + +# +# Optional devices. +# +arm/freescale/imx/imx_sdhci.c optional sdhci + +arm/freescale/imx/imx_wdog.c optional imxwdt + +dev/ffec/if_ffec.c optional ffec + +dev/uart/uart_dev_imx.c optional uart + +dev/usb/controller/ehci_imx.c optional ehci +arm/freescale/imx/imx6_usbphy.c optional ehci + +# +# Low-level serial console for debugging early kernel startup. +# +#arm/freescale/imx/console.c standard + +# +# Not ready yet... +# +#arm/freescale/imx/imx51_iomux.c optional iomux +#arm/freescale/imx/imx51_gpio.c optional gpio +#dev/ata/chipsets/ata-fsl.c optional imxata +#arm/freescale/imx/i2c.c optional fsliic +#dev/ofw/ofw_iicbus.c optional fsliic +#arm/freescale/imx/imx51_ipuv3.c optional sc + Added: head/sys/arm/freescale/imx/imx6_machdep.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/freescale/imx/imx6_machdep.c Fri Nov 1 00:21:09 2013 (r257483) @@ -0,0 +1,164 @@ +/*- + * Copyright (c) 2013 Ian Lepore + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include "opt_platform.h" + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* + * Set up static device mappings. Note that for imx this is called from + * initarm_lastaddr() so that it can return the lowest address used for static + * device mapping, maximizing kva space. + * + * This attempts to cover the most-used devices with 1MB section mappings, which + * is good for performance (uses fewer TLB entries for device access). + * + * ARMMP covers the interrupt controller, MPCore timers, global timer, and the + * L2 cache controller. Most of the 1MB range is unused reserved space. + * + * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. + * + * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in + * the memory map. When we get support for graphics it might make sense to + * static map some of that area. Be careful with other things in that area such + * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory. + */ +void +imx_devmap_init(void) +{ + const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; + const uint32_t IMX6_ARMMP_SIZE = 0x00100000; + const uint32_t IMX6_AIPS1_PHYS = 0x02000000; + const uint32_t IMX6_AIPS1_SIZE = 0x00100000; + const uint32_t IMX6_AIPS2_PHYS = 0x02100000; + const uint32_t IMX6_AIPS2_SIZE = 0x00100000; + + imx_devmap_addentry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); + imx_devmap_addentry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); + imx_devmap_addentry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); +} + +void +cpu_reset(void) +{ + const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; + + imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); +} + +/* + * Determine what flavor of imx6 we're running on. + * + * This code is based on the way u-boot does it. Information found on the web + * indicates that Freescale themselves were the original source of this logic, + * including the strange check for number of CPUs in the SCU configuration + * register, which is apparently needed on some revisions of the SOLO. + * + * According to the documentation, there is such a thing as an i.MX6 Dual + * (non-lite flavor). However, Freescale doesn't seem to have assigned it a + * number or provided any logic to handle it in their detection code. + * + * Note that the ANALOG_DIGPROG and SCU configuration registers are not + * documented in the chip reference manual. (SCU configuration is mentioned, + * but not mapped out in detail.) I think the bottom two bits of the scu config + * register may be ncpu-1. + * + * This hasn't been tested yet on a dual[-lite]. + * + * On a solo: + * digprog = 0x00610001 + * hwsoc = 0x00000062 + * scu config = 0x00000500 + * On a quad: + * digprog = 0x00630002 + * hwsoc = 0x00000063 + * scu config = 0x00005503 + */ +u_int imx_soc_type() +{ + const struct pmap_devmap *pd; + uint32_t digprog, hwsoc; + uint32_t *pcr; + const uint32_t HWSOC_MX6SL = 0x60; + const uint32_t HWSOC_MX6DL = 0x61; + const uint32_t HWSOC_MX6SOLO = 0x62; + const uint32_t HWSOC_MX6Q = 0x63; + const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; + + digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); + hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & + IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; + + if (hwsoc != HWSOC_MX6SL) { + digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); + hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> + IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; + /*printf("digprog = 0x%08x\n", digprog);*/ + if (hwsoc == HWSOC_MX6DL) { + pd = pmap_devmap_find_pa(SCU_CONFIG_PHYSADDR, 4); + if (pd != NULL) { + pcr = (uint32_t *)(pd->pd_va + + (SCU_CONFIG_PHYSADDR - pd->pd_pa)); + /*printf("scu config = 0x%08x\n", *pcr);*/ + if ((*pcr & 0x03) == 0) { + hwsoc = HWSOC_MX6SOLO; + } + } + } + } + /* printf("hwsoc 0x%08x\n", hwsoc); */ + + switch (hwsoc) { + case HWSOC_MX6SL: + return (IMXSOC_6SL); + case HWSOC_MX6SOLO: + return (IMXSOC_6S); + case HWSOC_MX6DL: + return (IMXSOC_6DL); + case HWSOC_MX6Q : + return (IMXSOC_6Q); + default: + printf("imx_soc_type: Don't understand hwsoc 0x%02x, " + "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); + break; + } + + return (IMXSOC_6Q); +} + Added: head/sys/arm/freescale/imx/imx6_pl310.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/freescale/imx/imx6_pl310.c Fri Nov 1 00:21:09 2013 (r257483) @@ -0,0 +1,98 @@ +/*- + * Copyright (c) 2012 Olivier Houchard. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +/* + * The machine-dependent part of the arm/pl310 driver for imx6 SoCs. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +void +platform_pl310_init(struct pl310_softc *sc) +{ + uint32_t aux, prefetch; + + aux = pl310_read4(sc, PL310_AUX_CTRL); + prefetch = pl310_read4(sc, PL310_PREFETCH_CTRL); + + if (bootverbose) { + device_printf(sc->sc_dev, "Early BRESP response: %s\n", + (aux & AUX_CTRL_EARLY_BRESP) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Instruction prefetch: %s\n", + (aux & AUX_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Data prefetch: %s\n", + (aux & AUX_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Non-secure interrupt control: %s\n", + (aux & AUX_CTRL_NS_INT_CTRL) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Non-secure lockdown: %s\n", + (aux & AUX_CTRL_NS_LOCKDOWN) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Share override: %s\n", + (aux & AUX_CTRL_SHARE_OVERRIDE) ? "enabled" : "disabled"); + + device_printf(sc->sc_dev, "Double linefil: %s\n", + (prefetch & PREFETCH_CTRL_DL) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Instruction prefetch: %s\n", + (prefetch & PREFETCH_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Data prefetch: %s\n", + (prefetch & PREFETCH_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Double linefill on WRAP request: %s\n", + (prefetch & PREFETCH_CTRL_DL_ON_WRAP) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Prefetch drop: %s\n", + (prefetch & PREFETCH_CTRL_PREFETCH_DROP) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Incr double Linefill: %s\n", + (prefetch & PREFETCH_CTRL_INCR_DL) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Not same ID on exclusive sequence: %s\n", + (prefetch & PREFETCH_CTRL_NOTSAMEID) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Prefetch offset: %d\n", + (prefetch & PREFETCH_CTRL_OFFSET_MASK)); + } +} + +void +platform_pl310_write_ctrl(struct pl310_softc *sc, uint32_t val) +{ + + pl310_write4(sc, PL310_CTRL, val); +} + +void +platform_pl310_write_debug(struct pl310_softc *sc, uint32_t val) +{ + + pl310_write4(sc, PL310_DEBUG_CTRL, val); +} + Added: head/sys/arm/freescale/imx/std.imx6 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/freescale/imx/std.imx6 Fri Nov 1 00:21:09 2013 (r257483) @@ -0,0 +1,15 @@ +# $FreeBSD$ +machine arm armv6 +cpu CPU_CORTEXA +makeoptions ARM_LITTLE_ENDIAN +options ARM_L2_PIPT + +options KERNVIRTADDR = 0xc2000000 +makeoptions KERNVIRTADDR = 0xc2000000 +options KERNPHYSADDR = 0x12000000 +makeoptions KERNPHYSADDR = 0x12000000 +options PHYSADDR = 0x10000000 +options STARTUP_PAGETABLE_ADDR = 0x11f00000 + +files "../freescale/imx/files.imx6" +