From owner-svn-src-head@freebsd.org Fri Nov 24 13:52:00 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7A3F9DE6F61; Fri, 24 Nov 2017 13:52:00 +0000 (UTC) (envelope-from ed@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 473CB75BE1; Fri, 24 Nov 2017 13:52:00 +0000 (UTC) (envelope-from ed@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id vAODpxgj035517; Fri, 24 Nov 2017 13:51:59 GMT (envelope-from ed@FreeBSD.org) Received: (from ed@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id vAODpxgc035516; Fri, 24 Nov 2017 13:51:59 GMT (envelope-from ed@FreeBSD.org) Message-Id: <201711241351.vAODpxgc035516@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ed set sender to ed@FreeBSD.org using -f From: Ed Schouten Date: Fri, 24 Nov 2017 13:51:59 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r326166 - head/sys/arm64/arm64 X-SVN-Group: head X-SVN-Commit-Author: ed X-SVN-Commit-Paths: head/sys/arm64/arm64 X-SVN-Commit-Revision: 326166 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Nov 2017 13:52:00 -0000 Author: ed Date: Fri Nov 24 13:51:59 2017 New Revision: 326166 URL: https://svnweb.freebsd.org/changeset/base/326166 Log: Set CP15BEN in SCTLR to make memory barriers work in 32-bit mode. Binaries generated by Clang for ARMv6 may contain these instructions: MCR p15, 0, , c7, c10, 5 These instructions are deprecated as of ARMv7, which is why modern processors have a way of toggling support for them. On FreeBSD/arm64 we currently disable support for these instructions, meaning that if 32-bit executables with these instructions are run, they would crash with SIGILL. This is likely not what we want. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D13145 Modified: head/sys/arm64/arm64/locore.S Modified: head/sys/arm64/arm64/locore.S ============================================================================== --- head/sys/arm64/arm64/locore.S Fri Nov 24 13:50:53 2017 (r326165) +++ head/sys/arm64/arm64/locore.S Fri Nov 24 13:51:59 2017 (r326166) @@ -628,11 +628,12 @@ sctlr_set: /* Bits to set */ .quad (SCTLR_LSMAOE | SCTLR_nTLSMD | SCTLR_UCI | SCTLR_SPAN | \ SCTLR_nTWE | SCTLR_nTWI | SCTLR_UCT | SCTLR_DZE | \ - SCTLR_I | SCTLR_SED | SCTLR_SA0 | SCTLR_SA | SCTLR_C | SCTLR_M) + SCTLR_I | SCTLR_SED | SCTLR_SA0 | SCTLR_SA | SCTLR_C | \ + SCTLR_M | SCTLR_CP15BEN) sctlr_clear: /* Bits to clear */ .quad (SCTLR_EE | SCTLR_EOE | SCTLR_IESB | SCTLR_WXN | SCTLR_UMA | \ - SCTLR_ITD | SCTLR_THEE | SCTLR_CP15BEN | SCTLR_A) + SCTLR_ITD | SCTLR_THEE | SCTLR_A) .globl abort abort: