From owner-svn-src-head@freebsd.org Fri Nov 25 16:04:37 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D9213C5490C; Fri, 25 Nov 2016 16:04:37 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id A89C5B86; Fri, 25 Nov 2016 16:04:37 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id uAPG4ads097791; Fri, 25 Nov 2016 16:04:36 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id uAPG4aSQ097790; Fri, 25 Nov 2016 16:04:36 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201611251604.uAPG4aSQ097790@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Fri, 25 Nov 2016 16:04:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r309145 - head/sys/arm64/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 Nov 2016 16:04:38 -0000 Author: andrew Date: Fri Nov 25 16:04:36 2016 New Revision: 309145 URL: https://svnweb.freebsd.org/changeset/base/309145 Log: Fix the TLB conflict abort value. This should be a no-op as we don't use this value in the code. Modified: head/sys/arm64/include/armreg.h Modified: head/sys/arm64/include/armreg.h ============================================================================== --- head/sys/arm64/include/armreg.h Fri Nov 25 14:44:49 2016 (r309144) +++ head/sys/arm64/include/armreg.h Fri Nov 25 16:04:36 2016 (r309145) @@ -115,7 +115,7 @@ #define ISS_DATA_DFSC_ECC_L2 (0x1e << 0) #define ISS_DATA_DFSC_ECC_L3 (0x1f << 0) #define ISS_DATA_DFSC_ALIGN (0x21 << 0) -#define ISS_DATA_DFSC_TLB_CONFLICT (0x28 << 0) +#define ISS_DATA_DFSC_TLB_CONFLICT (0x30 << 0) #define ESR_ELx_IL (0x01 << 25) #define ESR_ELx_EC_SHIFT 26 #define ESR_ELx_EC_MASK (0x3f << 26)