From owner-svn-src-all@freebsd.org Wed May 17 15:13:02 2017 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id AB64CD5CA65; Wed, 17 May 2017 15:13:02 +0000 (UTC) (envelope-from loos@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 78570266; Wed, 17 May 2017 15:13:02 +0000 (UTC) (envelope-from loos@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v4HFD16E084703; Wed, 17 May 2017 15:13:01 GMT (envelope-from loos@FreeBSD.org) Received: (from loos@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v4HFD1A3084702; Wed, 17 May 2017 15:13:01 GMT (envelope-from loos@FreeBSD.org) Message-Id: <201705171513.v4HFD1A3084702@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: loos set sender to loos@FreeBSD.org using -f From: Luiz Otavio O Souza Date: Wed, 17 May 2017 15:13:01 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r318404 - head/sys/arm/mv X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 May 2017 15:13:02 -0000 Author: loos Date: Wed May 17 15:13:01 2017 New Revision: 318404 URL: https://svnweb.freebsd.org/changeset/base/318404 Log: Move the IO Window Control Register defines out of the ARMADA38X ifdef. Fixes the build of Marvell kernels (other than ARMADA38X) after r318336. Reported by: mmel Modified: head/sys/arm/mv/mvwin.h Modified: head/sys/arm/mv/mvwin.h ============================================================================== --- head/sys/arm/mv/mvwin.h Wed May 17 14:35:21 2017 (r318403) +++ head/sys/arm/mv/mvwin.h Wed May 17 15:13:01 2017 (r318404) @@ -305,18 +305,6 @@ #define MV_BOOTROM_WIN_SIZE 0xF #define MV_CPU_SUBSYS_REGS_LEN 0x100 -/* IO Window Control Register fields */ -#define IO_WIN_SIZE_SHIFT 16 -#define IO_WIN_SIZE_MASK 0xFFFF -#define IO_WIN_ATTR_SHIFT 8 -#define IO_WIN_ATTR_MASK 0xFF -#define IO_WIN_TGT_SHIFT 4 -#define IO_WIN_TGT_MASK 0xF -#define IO_WIN_SYNC_SHIFT 1 -#define IO_WIN_SYNC_MASK 0x1 -#define IO_WIN_ENA_SHIFT 0 -#define IO_WIN_ENA_MASK 0x1 - #define IO_WIN_9_CTRL_OFFSET 0x98 #define IO_WIN_9_BASE_OFFSET 0x9C @@ -329,6 +317,18 @@ #define MV_SYNC_BARRIER_CTRL_ALL 0xFFFF #endif +/* IO Window Control Register fields */ +#define IO_WIN_SIZE_SHIFT 16 +#define IO_WIN_SIZE_MASK 0xFFFF +#define IO_WIN_ATTR_SHIFT 8 +#define IO_WIN_ATTR_MASK 0xFF +#define IO_WIN_TGT_SHIFT 4 +#define IO_WIN_TGT_MASK 0xF +#define IO_WIN_SYNC_SHIFT 1 +#define IO_WIN_SYNC_MASK 0x1 +#define IO_WIN_ENA_SHIFT 0 +#define IO_WIN_ENA_MASK 0x1 + #define WIN_REG_IDX_RD(pre,reg,off,base) \ static __inline uint32_t \ pre ## _ ## reg ## _read(int i) \