From owner-svn-src-head@FreeBSD.ORG Fri May 16 16:36:08 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 9D80CD36; Fri, 16 May 2014 16:36:08 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 71FBE2185; Fri, 16 May 2014 16:36:08 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s4GGa8YB045541; Fri, 16 May 2014 16:36:08 GMT (envelope-from hselasky@svn.freebsd.org) Received: (from hselasky@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s4GGa8g4045538; Fri, 16 May 2014 16:36:08 GMT (envelope-from hselasky@svn.freebsd.org) Message-Id: <201405161636.s4GGa8g4045538@svn.freebsd.org> From: Hans Petter Selasky Date: Fri, 16 May 2014 16:36:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r266262 - head/sys/dev/usb/controller X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 May 2014 16:36:08 -0000 Author: hselasky Date: Fri May 16 16:36:07 2014 New Revision: 266262 URL: http://svnweb.freebsd.org/changeset/base/266262 Log: Enable host controller interrupts. Sponsored by: DARPA, AFRL Modified: head/sys/dev/usb/controller/saf1761_otg.c head/sys/dev/usb/controller/saf1761_otg_reg.h Modified: head/sys/dev/usb/controller/saf1761_otg.c ============================================================================== --- head/sys/dev/usb/controller/saf1761_otg.c Fri May 16 16:28:09 2014 (r266261) +++ head/sys/dev/usb/controller/saf1761_otg.c Fri May 16 16:36:07 2014 (r266262) @@ -971,16 +971,20 @@ void saf1761_otg_interrupt(struct saf1761_otg_softc *sc) { uint32_t status; + uint32_t hcstat; USB_BUS_LOCK(&sc->sc_bus); - status = SAF1761_READ_4(sc, SOTG_DCINTERRUPT); + hcstat = SAF1761_READ_4(sc, SOTG_HCINTERRUPT); + /* acknowledge all host controller interrupts */ + SAF1761_WRITE_4(sc, SOTG_HCINTERRUPT, hcstat); - /* acknowledge all interrupts */ + status = SAF1761_READ_4(sc, SOTG_DCINTERRUPT); + /* acknowledge all device controller interrupts */ SAF1761_WRITE_4(sc, SOTG_DCINTERRUPT, status); - DPRINTF("DCINTERRUPT=0x%08x SOF=0x%04x\n", status, - SAF1761_READ_2(sc, SOTG_FRAME_NUM)); + DPRINTF("DCINTERRUPT=0x%08x HCINTERRUPT=0x%08x SOF=0x%04x\n", + status, hcstat, SAF1761_READ_2(sc, SOTG_FRAME_NUM)); /* update VBUS and ID bits, if any */ if (status & SOTG_DCINTERRUPT_IEVBUS) { @@ -1716,6 +1720,13 @@ saf1761_otg_init(struct saf1761_otg_soft /* start the HC */ SAF1761_WRITE_4(sc, SOTG_USBCMD, SOTG_USBCMD_RS); + /* enable HC interrupts */ + SAF1761_WRITE_4(sc, SOTG_HCINTERRUPT_ENABLE, + SOTG_HCINTERRUPT_OTG_IRQ | + SOTG_HCINTERRUPT_ISO_IRQ | + SOTG_HCINTERRUPT_ALT_IRQ | + SOTG_HCINTERRUPT_INT_IRQ); + /* poll initial VBUS status */ saf1761_otg_update_vbus(sc); Modified: head/sys/dev/usb/controller/saf1761_otg_reg.h ============================================================================== --- head/sys/dev/usb/controller/saf1761_otg_reg.h Fri May 16 16:28:09 2014 (r266261) +++ head/sys/dev/usb/controller/saf1761_otg_reg.h Fri May 16 16:36:07 2014 (r266262) @@ -210,5 +210,15 @@ #define SOTG_USBCMD_LHCR (1 << 7) #define SOTG_USBCMD_HCRESET (1 << 1) #define SOTG_USBCMD_RS (1 << 0) +#define SOTG_HCINTERRUPT 0x310 +#define SOTG_HCINTERRUPT_OTG_IRQ (1 << 10) +#define SOTG_HCINTERRUPT_ISO_IRQ (1 << 9) +#define SOTG_HCINTERRUPT_ALT_IRQ (1 << 8) +#define SOTG_HCINTERRUPT_INT_IRQ (1 << 7) +#define SOTG_HCINTERRUPT_CLKREADY (1 << 6) +#define SOTG_HCINTERRUPT_HCSUSP (1 << 5) +#define SOTG_HCINTERRUPT_DMAEOTINT (1 << 3) +#define SOTG_HCINTERRUPT_SOFITLINT (1 << 1) +#define SOTG_HCINTERRUPT_ENABLE 0x314 #endif /* _SAF1761_OTG_REG_H_ */