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Date:      Wed, 19 Aug 2020 10:13:23 +0200
From:      Johnny Sorocil <jsorocil@gmail.com>
To:        freebsd-arm@freebsd.org
Subject:   Disabling internal RTC ends up in hang
Message-ID:  <CADxA8Sr%2Bmkx1GvgabFWOCaN3nURy=LoOH9VM9DduynWbW%2Bo_Mg@mail.gmail.com>
In-Reply-To: <CADxA8Sq6TrjDBW0PH_HoywrKDjT=mKxH0F27XYLxDN=d=QHHyw@mail.gmail.com>
References:  <CADxA8Sq6TrjDBW0PH_HoywrKDjT=mKxH0F27XYLxDN=d=QHHyw@mail.gmail.com>

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I wan't to have the correct date on my ARM SBC (armv7 Orange Pi Zero board
which doesn't have an RTC battery socket). Got an external I2C RTC module
(DS3231) which is recognized and works (after adding device tree overlay):

root@arm2:~ # sysctl dev.ds3231
dev.ds3231.0.32khz_enable: 1
dev.ds3231.0.sqw_mode: interrupt
dev.ds3231.0.sqw_freq: 1024
dev.ds3231.0.bbsqw: 0
dev.ds3231.0.temp_conv: 0
dev.ds3231.0.temperature: 30.0C
dev.ds3231.0.%parent: iicbus0
dev.ds3231.0.%pnpinfo: name=ds3231@68 compat=maxim,ds3231
dev.ds3231.0.%location: addr=0xd0
dev.ds3231.0.%driver: ds3231
dev.ds3231.0.%desc: Maxim DS3231 RTC
dev.ds3231.%parent:


Setting a date works - the system will have the correct date until power is
disconnected. After power is connected again, system time is not read from
RTC.

After powercycle:

root@arm2:~ # date
Fri Jan  1 00:22:25 UTC 2010
root@arm2:~ # ./ds1307 -a 0x68 -r
09:37:59 12/08/2020

NTP is not used. ds1307
<https://raw.githubusercontent.com/vzaigrin/ds1307/master/DS1307.C>; program
is used to directly read registers from the I2C module.

Disabling internal rtc (via device tree overlay) results in kernel panic &
hang:

---<<BOOT>>---
Copyright (c) 1992-2019 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993,
1994
        The Regents of the University of California. All rights
reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 12.1-RELEASE r354233 GENERIC arm
FreeBSD clang version 8.0.1 (tags/RELEASE_801/final 366581) (based on
LLVM 8.0.1)
VT: init without driver.
module_register: cannot register ofwbus/pcib from kernel; already
loaded from kernel
Module ofwbus/pcib failed to register: 17
module_register: cannot register simplebus/pcib from kernel; already
loaded from kernel
Module simplebus/pcib failed to register: 17
CPU: ARM Cortex-A7 r0p5 (ECO: 0x00000000)
CPU Features:
  Multiprocessing, Thumb2, Security, Virtualization, Generic Timer, VMSAv7,
  PXN, LPAE, Coherent Walk
Optional instructions:
  SDIV/UDIV, UMULL, SMULL, SIMD(ext)
LoUU:2 LoC:3 LoUIS:2
Cache level 1:
 32KB/64B 4-way data cache WB Read-Alloc Write-Alloc
 32KB/32B 2-way instruction cache Read-Alloc
Cache level 2:
 512KB/64B 8-way unified cache WB Read-Alloc Write-Alloc
real memory  = 536289280 (511 MB)
avail memory = 509890560 (486 MB)
No PSCI/SMCCC call function found
FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
random: unblocking device.
random: entropy device external interface
kbd0 at kbdmux0
ofwbus0: <Open Firmware Device Tree>
ofw_clkbus0: <OFW clocks bus> on ofwbus0
clk_fixed0: <Fixed clock> on ofw_clkbus0
clk_fixed1: <Fixed clock> on ofw_clkbus0
simplebus0: <Flattened device tree simple bus> on ofwbus0
regfix0: <Fixed Regulator> on ofwbus0
regfix1: <Fixed Regulator> on ofwbus0
regfix2: <Fixed Regulator> on ofwbus0
regfix3: <Fixed Regulator> on ofwbus0
ccu_h3ng0: <Allwinner H3/H5 Clock Control Unit NG> mem
0x1c20000-0x1c203ff on simplebus0
ccu_h3ng0: Clock apb2 have unknown parent: osc32k
ccu_h3ng0: Clock ahb1 have unknown parent: osc32k
ccu_h3ng0: Clock cpux have unknown parent: osc32k
panic: cannot finalize clkdom initialization

cpuid = 0
time = 1
Uptime: 1s
Automatic reboot in 15 seconds - press a key on the console to abort
Rebooting...
Reset: watchdog device has not been initialized
Reset failed!


The same happens with -CURRENT with custom kernel compiled without aw_rtc
device:

% cat usr/src/sys/arm/conf/MYKERNEL
include GENERIC
ident   MYKERNEL

nodevice        aw_rtc            # Allwinner On-chip RTC

Device tree overlay for disabling internal RTC is not enabled and after
connecting serial console and booting that kernel:

...
simplebus0: <Flattened device tree simple bus> on ofwbus0
regfix0: <Fixed Regulator> on ofwbus0
regfix1: <Fixed Regulator> on ofwbus0
regfix2: <Fixed Regulator> on ofwbus0
regfix3: <Fixed Regulator> on ofwbus0
ccu_h3ng0: <Allwinner H3/H5 Clock Control Unit NG> mem
0x1c20000-0x1c203ff on simplebus0
ccu_h3ng0: Clock apb2 have unknown parent: osc32k
ccu_h3ng0: Clock ahb1 have unknown parent: osc32k
ccu_h3ng0: Clock cpux have unknown parent: osc32k
panic: cannot finalize clkdom initialization

cpuid = 0
time = 1
KDB: stack backtrace:
db_trace_self() at db_trace_self
         pc = 0xc0578934  lr = 0xc0079eb0 (db_trace_self_wrapper+0x30)
         sp = 0xc0d14b98  fp = 0xc0d14cb0
db_trace_self_wrapper() at db_trace_self_wrapper+0x30
         pc = 0xc0079eb0  lr = 0xc02bf54c (vpanic+0x174)
         sp = 0xc0d14cb8  fp = 0xc0d14cd8
         r4 = 0x00000100  r5 = 0xc0a42b20
         r6 = 0xc06a0af6  r7 = 0x00000000
vpanic() at vpanic+0x174
         pc = 0xc02bf54c  lr = 0xc02bf308 (doadump)
         sp = 0xc0d14ce0  fp = 0xc0d14ce4
         r4 = 0x000008c0  r5 = 0xd02f9800
         r6 = 0x00000071  r7 = 0xc0d14d18
         r8 = 0xc0d14d08  r9 = 0x00000001
        r10 = 0x00000000
doadump() at doadump
         pc = 0xc02bf308  lr = 0xc05be870 (aw_ccung_write_4)
         sp = 0xc0d14cec  fp = 0xc0d14d50
         r4 = 0x00000000  r5 = 0xc0d14ce4
         r6 = 0xc02bf308 r10 = 0xc0d14cec
aw_ccung_write_4() at aw_ccung_write_4
         pc = 0xc05be870  lr = 0xc02fc1b8 (device_attach+0x50c)
         sp = 0xc0d14d58  fp = 0xc0d14da0
         r4 = 0x00000000  r5 = 0xc0ae30a4
         r6 = 0x80040001 r10 = 0x80000803
device_attach() at device_attach+0x50c
         pc = 0xc02fc1b8  lr = 0xc02fbc10
(device_probe_and_attach+0x8c)
         sp = 0xc0d14da8  fp = 0xc0d14dc0
         r4 = 0xd00de400  r5 = 0xc2471f80
         r6 = 0x5e4a6f28  r7 = 0x00000000
         r8 = 0xc0a615a8  r9 = 0xc0a615ac
        r10 = 0xc0a4278c
device_probe_and_attach() at device_probe_and_attach+0x8c
         pc = 0xc02fbc10  lr = 0xc02fdf5c (bus_generic_new_pass+0xb0)
         sp = 0xc0d14dc8  fp = 0xc0d14de0
         r4 = 0xd00de400  r5 = 0xc0848ef8
         r6 = 0xc088cba0 r10 = 0xc0a4278c
bus_generic_new_pass() at bus_generic_new_pass+0xb0
         pc = 0xc02fdf5c  lr = 0xc02fdfa8 (bus_generic_new_pass+0xfc)
         sp = 0xc0d14de8  fp = 0xc0d14e00
         r4 = 0xd00df980  r5 = 0xc0848ef8
         r6 = 0xd00e0000  r7 = 0x00000000
         r8 = 0xc0a615a8 r10 = 0xc0a4278c
bus_generic_new_pass() at bus_generic_new_pass+0xfc
         pc = 0xc02fdfa8  lr = 0xc02fdfa8 (bus_generic_new_pass+0xfc)
         sp = 0xc0d14e08  fp = 0xc0d14e20
         r4 = 0xd00dfc00  r5 = 0xc0848ef8
         r6 = 0xd00e0000  r7 = 0x00000000
         r8 = 0xc0a615a8 r10 = 0xc0a4278c
bus_generic_new_pass() at bus_generic_new_pass+0xfc
         pc = 0xc02fdfa8  lr = 0xc02fdfa8 (bus_generic_new_pass+0xfc)
         sp = 0xc0d14e28  fp = 0xc0d14e40
         r4 = 0xd00dfc80  r5 = 0xc0848ef8
         r6 = 0xd00e0000  r7 = 0x00000000
         r8 = 0xc0a615a8 r10 = 0xc0a4278c
bus_generic_new_pass() at bus_generic_new_pass+0xfc
         pc = 0xc02fdfa8  lr = 0xc02f9490 (bus_set_pass+0x54)
         sp = 0xc0d14e48  fp = 0xc0d14e60
         r4 = 0xd00e78a0  r5 = 0xc0848ef8
         r6 = 0xd00e0000  r7 = 0xc0a615a8
         r8 = 0x7fffffff r10 = 0xc0a4278c
bus_set_pass() at bus_set_pass+0x54
         pc = 0xc02f9490  lr = 0xc0255904 (mi_startup+0x2a4)
         sp = 0xc0d14e68  fp = 0xc0d14e90
         r4 = 0xc08a48b4  r5 = 0xc0a42788
         r6 = 0x00800001  r7 = 0x00000000
         r8 = 0x03800000  r9 = 0xc0a42794
mi_startup() at mi_startup+0x2a4
         pc = 0xc0255904  lr = 0xc00002c4 (_start+0x144)
         sp = 0xc0d14e98  fp = 0x00000000
         r4 = 0xc00003f8  r5 = 0xc0b1c000
         r6 = 0x00000000  r7 = 0x00c52078
         r8 = 0xc0cdd000  r9 = 0x5af1e780
        r10 = 0x00000000
_start() at _start+0x144
         pc = 0xc00002c4  lr = 0xc00002c4 (_start+0x144)
         sp = 0xc0d14e98  fp = 0x00000000
KDB: enter: panic
[ thread pid 0 tid 100000 ]
Stopped at      kdb_enter+0x58: ldrb    r15, [r15, r15, ror r15]!

It is possible to run at boot script which will fetch time from an external
module and set system clock, but I am wondering if that can be done
automatically (disabling internal rtc and using external)?
Should it be possible to boot an ARM SBC without an internal RTC device?



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