Date: Fri, 29 Nov 1996 12:21:04 +0800 From: Peter Wemm <peter@spinner.dialix.com> To: Nate Williams <nate@mt.sri.com> Cc: Steve Passe <smp@csn.net>, freebsd-smp@freebsd.org Subject: Re: cvs commit: sys/i386/i386 locore.s swtch.s sys/i386/include pmap.h Message-ID: <199611290421.MAA10484@spinner.DIALix.COM> In-Reply-To: Your message of "Thu, 28 Nov 1996 09:20:45 MST." <199611281620.JAA14714@rocky.mt.sri.com>
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Nate Williams wrote:
> > > Processors: APIC ID Version State Family Model Step Fla
gs
> > > 0 0x11 BSP, usable 5 2 1 0x
07bf
> > > 1 0x11 AP, usable 5 2 1 0x
07bf
> > > ^^^
> > > without problems (that I'm aware of).
> >
> > I think Step 6 was where they fixed the FPU divide bug.. (I saw a
> > reference to this on "The Ultimate Chip list" or something like that)
>
> Nope, I've got a Stepping 5 P100 chip here and it's work fine (been
> tested and everything).
Well, that's what I suspected too. I had only seen step 1, 5 and much
higher. I wondered if there was a mistake in the list and in fact it was
step 5 that fixes it. (I have P5-90 Step 1 cpus btw)
BTW, does anybody have the code to test for the fdiv bug? I looked in the
linux kernel to see what it tests (since the fdiv bug is listed in
/proc/cpuinfo), and discovered that the linux (2.0.x last time I looked)
kernel doesn't even test it!! it simply sets the value to "no". What a
crock! (.. unless I missed the test..)
> Nate
Cheers,
-Peter
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