Date: Thu, 21 Sep 2023 09:27:43 +0200 From: "Patrick M. Hausen" <pmh@hausen.com> To: Mark Millard <marklmi@yahoo.com> Cc: freebsd-arm <freebsd-arm@freebsd.org> Subject: Re: Getting a stable MAC address for a RPI CM3+ with ue0 interface Message-ID: <EE1F4E5D-0DD1-421E-9D98-473213CBE73C@hausen.com> In-Reply-To: <5953C54F-D0A9-4842-AC4C-CF431E095F73@yahoo.com> References: <3C1032FF-B914-4863-8A03-759A8B4BE216@hausen.com> <77E70D30-8E7D-42DC-A041-3A783E1C6908@yahoo.com> <5205C76E-BAB4-4AB7-8A03-1E8A2D4353BB@hausen.com> <4C192A4E-8F53-4FE5-B1E3-836943F9A050@hausen.com> <cdddd5cf-c6a5-3a50-9688-8bb65f1c14ce@FreeBSD.org> <3306D438-576B-46A6-A124-1F1D803A2236@hausen.com> <6a842b75-c9ea-d697-c223-c2d8c5653d68@FreeBSD.org> <38325594-6F01-4E43-86A9-D3C92A5151B7@yahoo.com> <B8AB54AB-6EDF-4763-8FA5-5A9BA540A0FB@hausen.com> <5953C54F-D0A9-4842-AC4C-CF431E095F73@yahoo.com>
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Am 21.09.2023 um 09:19 schrieb Mark Millard <marklmi@yahoo.com>:
> No evidence above of any ethernet device.
>=20
> Does the current_sorted.dts have anything in it
> mentioning "ethernet"? "local-mac-address"?
>=20
> I've no direct knowledge of the CM3+ . What are
> the details of how ethernet has been provided for
> your context?
Ethernet is provided externally to the CM by the TuringPi mainboard
- or by a development board I use for flashing. Connection is USB.
root@pi1:~ # usbconfig show_ifdrv
ugen1.1: <DWCOTG OTG Root HUB> at usbus1, cfg=3D0 md=3DHOST spd=3DHIGH =
(480Mbps) pwr=3DSAVE (0mA)
ugen1.1.0: uhub0: <DWCOTG OTG Root HUB, class 9/0, rev 2.00/1.00, addr =
1>
ugen1.2: <vendor 0x0424 product 0x9514> at usbus1, cfg=3D0 md=3DHOST =
spd=3DHIGH (480Mbps) pwr=3DSAVE (2mA)
ugen1.2.0: uhub1: <vendor 0x0424 product 0x9514, class 9/0, rev =
2.00/2.00, addr 2>
ugen1.3: <vendor 0x0424 product 0xec00> at usbus1, cfg=3D0 md=3DHOST =
spd=3DHIGH (480Mbps) pwr=3DON (2mA)
ugen1.3.0: smsc0: <vendor 0x0424 product 0xec00, rev 2.00/2.00, addr 3>
The complete dts is this:
------------
$ cat turingpi_sorted.dts=20
/dts-v1/;
/memreserve/ 0x0 0x1000;
/ {
memreserve =3D <0x3b400000 0x4c00000>;
serial-number =3D "00000000fb09cb7d";
compatible =3D "raspberrypi,3-compute-module", "brcm,bcm2837";
model =3D "Raspberry Pi Compute Module 3 Plus Rev 1.0";
#address-cells =3D <0x1>;
#size-cells =3D <0x1>;
interrupt-parent =3D <0x1>;
framebuffer@3eaf0000 {
format =3D "a8r8g8b8";
stride =3D <0xa40>;
height =3D <0x1a0>;
width =3D <0x290>;
reg =3D <0x3eaf0000 0x10a800>;
compatible =3D "simple-framebuffer";
status =3D "okay";
};
psci {
compatible =3D "arm,psci-0.2";
method =3D "smc";
};
system {
linux,serial =3D <0x0 0xfb09cb7d>;
linux,revision =3D <0xa02100>;
};
axi {
vc_mem {
reg =3D <0x3ec00000 0x40000000 0xc0000000>;
};
};
aliases {
i2c_arm =3D "/soc/i2c@7e804000";
i2c =3D "/soc/i2c@7e804000";
i2c_vc =3D "/soc/i2c0mux/i2c@0";
serial0 =3D "/soc/serial@7e201000";
serial1 =3D "/soc/serial@7e215040";
aux =3D "/soc/aux@7e215000";
sound =3D "/soc/sound";
soc =3D "/soc";
dma =3D "/soc/dma@7e007000";
intc =3D "/soc/interrupt-controller@7e00b200";
watchdog =3D "/soc/watchdog@7e100000";
random =3D "/soc/rng@7e104000";
mailbox =3D "/soc/mailbox@7e00b880";
gpio =3D "/soc/gpio@7e200000";
uart0 =3D "/soc/serial@7e201000";
uart1 =3D "/soc/serial@7e215040";
sdhost =3D "/soc/mmc@7e202000";
mmc =3D "/soc/mmc@7e300000";
mmc1 =3D "/soc/mmc@7e300000";
mmc0 =3D "/soc/mmc@7e202000";
i2s =3D "/soc/i2s@7e203000";
i2c0 =3D "/soc/i2c0mux/i2c@0";
i2c1 =3D "/soc/i2c@7e804000";
i2c10 =3D "/soc/i2c0mux/i2c@1";
spi0 =3D "/soc/spi@7e204000";
spi1 =3D "/soc/spi@7e215080";
spi2 =3D "/soc/spi@7e2150c0";
usb =3D "/soc/usb@7e980000";
leds =3D "/leds";
fb =3D "/soc/fb";
thermal =3D "/soc/thermal@7e212000";
axiperf =3D "/soc/axiperf";
i2c2 =3D "/soc/i2c@7e805000";
};
chosen {
fixup-applied;
u-boot,version =3D "2023.07.02";
user-warnings =3D [64 74 65 72 72 6f 72 3a 20 63 61 6e 27 74 20 66 69 6e =
64 20 73 79 6d 62 6f 6c 20 27 75 61 72 74 30 5f 70 69 6e 73 27 0a 46 61 =
69 6c 65 64 20 74 6f 20 72 65 73 6f 6c 76 65 20 6f 76 65 72 6c 61 79 20 =
27 64 69 73 61 62 6c 65 2d 62 74 27 0a];
rng-seed =3D <0x17f7438c 0x2ab979c8 0xc4352759 0x305da3e8 0x4304ea0a =
0x6ce10bfb 0xa633ae6 0xcada5dfc 0x854eeecb 0x925b1f20 0x12bdb423 =
0x1ebbf917 0x4b434ef3 0x21939e04 0x4ee3dcc7 0xe3f5af57>;
kaslr-seed =3D <0x64f204d4 0x19ed2123>;
os_prefix;
overlay_prefix =3D [6f 76 65 72 6c 61 79 73 2f];
rpi-boardrev-ext =3D <0x0>;
log =3D <0x3ff80000 0x7ffe0>;
bootargs =3D "coherent_pool=3D1M snd_bcm2835.enable_headphones=3D0 =
snd_bcm2835.enable_hdmi=3D1 bcm2708_fb.fbwidth=3D656 =
bcm2708_fb.fbheight=3D416 bcm2708_fb.fbswap=3D1 =
smsc95xx.macaddr=3DB8:27:EB:09:CB:7D vc_mem.mem_base=3D0x3ec00000 =
vc_mem.mem_size=3D0x40000000 force_mac_address=3Db8:27:eb:09:cb:7d";
phandle =3D <0x2f>;
bootloader {
boot-mode =3D <0x1>;
tryboot =3D <0x0>;
rsts =3D <0x1000>;
partition =3D <0x0>;
};
};
reserved-memory {
#address-cells =3D <0x1>;
#size-cells =3D <0x1>;
ranges;
phandle =3D <0x34>;
linux,cma {
compatible =3D "shared-dma-pool";
size =3D <0x4000000>;
reusable;
linux,cma-default;
phandle =3D <0x35>;
};
};
thermal-zones {
cpu-thermal {
polling-delay-passive =3D <0x0>;
polling-delay =3D <0x3e8>;
thermal-sensors =3D <0x2>;
coefficients =3D <0xfffffde6 0x64960>;
phandle =3D <0x36>;
trips {
phandle =3D <0x37>;
cpu-crit {
temperature =3D <0x1adb0>;
hysteresis =3D <0x0>;
type =3D "critical";
};
};
cooling-maps {
phandle =3D <0x38>;
};
};
};
soc {
compatible =3D "simple-bus";
#address-cells =3D <0x1>;
#size-cells =3D <0x1>;
ranges =3D <0x7e000000 0x3f000000 0x1000000 0x40000000 0x40000000 =
0x1000>;
dma-ranges =3D <0xc0000000 0x0 0x3f000000>;
phandle =3D <0x39>;
txp@7e004000 {
compatible =3D "brcm,bcm2835-txp";
reg =3D <0x7e004000 0x20>;
interrupts =3D <0x1 0xb>;
status =3D "disabled";
phandle =3D <0x3a>;
};
cprman@7e101000 {
compatible =3D "brcm,bcm2835-cprman";
#clock-cells =3D <0x1>;
reg =3D <0x7e101000 0x2000>;
clocks =3D <0x3 0x4 0x0 0x4 0x1 0x4 0x2 0x5 0x0 0x5 0x1 0x5 0x2>;
firmware =3D <0x6>;
phandle =3D <0x8>;
};
mailbox@7e00b880 {
compatible =3D "brcm,bcm2835-mbox";
reg =3D <0x7e00b880 0x40>;
interrupts =3D <0x0 0x1>;
#mbox-cells =3D <0x0>;
phandle =3D <0x1b>;
};
gpio@7e200000 {
compatible =3D "brcm,bcm2835-gpio";
reg =3D <0x7e200000 0xb4>;
interrupts =3D <0x2 0x11 0x2 0x12>;
gpio-controller;
#gpio-cells =3D <0x2>;
interrupt-controller;
#interrupt-cells =3D <0x2>;
gpio-ranges =3D <0x7 0x0 0x0 0x36>;
pinctrl-names =3D "default";
gpio-line-names =3D "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", =
"GPIO5", "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10", "GPIO11", =
"GPIO12", "GPIO13", "GPIO14", "GPIO15", "GPIO16", "GPIO17", "GPIO18", =
"GPIO19", "GPIO20", "GPIO21", "GPIO22", "GPIO23", "GPIO24", "GPIO25", =
"GPIO26", "GPIO27", "GPIO28", "GPIO29", "GPIO30", "GPIO31", "GPIO32", =
"GPIO33", "GPIO34", "GPIO35", "GPIO36", "GPIO37", "GPIO38", "GPIO39", =
"GPIO40", "GPIO41", "GPIO42", "GPIO43", "GPIO44", "GPIO45", "SMPS_SCL", =
"SMPS_SDA", "SD_CLK_R", "SD_CMD_R", "SD_DATA0_R", "SD_DATA1_R", =
"SD_DATA2_R", "SD_DATA3_R";
phandle =3D <0x7>;
mmc_pins {
phandle =3D <0x8d>;
brcm,pull =3D <0x0 0x2 0x2 0x2 0x2 0x2>;
brcm,function =3D <0x7>;
brcm,pins =3D <0x30 0x31 0x32 0x33 0x34 0x35>;
};
dpi_gpio0 {
brcm,pins =3D <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd =
0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
brcm,function =3D <0x6>;
phandle =3D <0x3b>;
};
emmc_gpio22 {
brcm,pins =3D <0x16 0x17 0x18 0x19 0x1a 0x1b>;
brcm,function =3D <0x7>;
phandle =3D <0x3c>;
};
emmc_gpio34 {
brcm,pins =3D <0x22 0x23 0x24 0x25 0x26 0x27>;
brcm,function =3D <0x7>;
brcm,pull =3D <0x0 0x2 0x2 0x2 0x2 0x2>;
phandle =3D <0x3d>;
};
emmc_gpio48 {
brcm,pins =3D <0x30 0x31 0x32 0x33 0x34 0x35>;
brcm,function =3D <0x7>;
phandle =3D <0x10>;
};
gpclk0_gpio4 {
brcm,pins =3D <0x4>;
brcm,function =3D <0x4>;
phandle =3D <0x3e>;
};
gpclk1_gpio5 {
brcm,pins =3D <0x5>;
brcm,function =3D <0x4>;
phandle =3D <0x3f>;
};
gpclk1_gpio42 {
brcm,pins =3D <0x2a>;
brcm,function =3D <0x4>;
phandle =3D <0x40>;
};
gpclk1_gpio44 {
brcm,pins =3D <0x2c>;
brcm,function =3D <0x4>;
phandle =3D <0x41>;
};
gpclk2_gpio6 {
brcm,pins =3D <0x6>;
brcm,function =3D <0x4>;
phandle =3D <0x42>;
};
gpclk2_gpio43 {
brcm,pins =3D <0x2b>;
brcm,function =3D <0x4>;
brcm,pull =3D <0x0>;
phandle =3D <0x43>;
};
i2c0_gpio0 {
brcm,pins =3D <0x0 0x1>;
brcm,function =3D <0x4>;
phandle =3D <0x19>;
};
i2c0_gpio28 {
brcm,pins =3D <0x1c 0x1d>;
brcm,function =3D <0x4>;
phandle =3D <0x1a>;
};
i2c0_gpio44 {
brcm,pins =3D <0x2c 0x2d>;
brcm,function =3D <0x5>;
phandle =3D <0x44>;
};
i2c1_gpio2 {
brcm,pins =3D <0x2 0x3>;
brcm,function =3D <0x4>;
phandle =3D <0x45>;
};
i2c1_gpio44 {
brcm,pins =3D <0x2c 0x2d>;
brcm,function =3D <0x6>;
phandle =3D <0x46>;
};
jtag_gpio22 {
brcm,pins =3D <0x16 0x17 0x18 0x19 0x1a 0x1b>;
brcm,function =3D <0x3>;
phandle =3D <0x47>;
};
pcm_gpio18 {
brcm,pins =3D <0x12 0x13 0x14 0x15>;
brcm,function =3D <0x4>;
phandle =3D <0x48>;
};
pcm_gpio28 {
brcm,pins =3D <0x1c 0x1d 0x1e 0x1f>;
brcm,function =3D <0x6>;
phandle =3D <0x49>;
};
sdhost_gpio48 {
brcm,pins =3D <0x30 0x31 0x32 0x33 0x34 0x35>;
brcm,function =3D <0x4>;
phandle =3D <0xa>;
};
spi0_gpio7 {
brcm,pins =3D <0x7 0x8 0x9 0xa 0xb>;
brcm,function =3D <0x4>;
phandle =3D <0x4a>;
};
spi0_gpio35 {
brcm,pins =3D <0x23 0x24 0x25 0x26 0x27>;
brcm,function =3D <0x4>;
phandle =3D <0x4b>;
};
spi1_gpio16 {
brcm,pins =3D <0x10 0x11 0x12 0x13 0x14 0x15>;
brcm,function =3D <0x3>;
phandle =3D <0x4c>;
};
spi2_gpio40 {
brcm,pins =3D <0x28 0x29 0x2a 0x2b 0x2c 0x2d>;
brcm,function =3D <0x3>;
phandle =3D <0x4d>;
};
uart0_gpio14 {
brcm,pins =3D <0xe 0xf>;
brcm,function =3D <0x4>;
phandle =3D <0x4e>;
};
uart0_ctsrts_gpio16 {
brcm,pins =3D <0x10 0x11>;
brcm,function =3D <0x7>;
phandle =3D <0x4f>;
};
uart0_ctsrts_gpio30 {
brcm,pins =3D <0x1e 0x1f>;
brcm,function =3D <0x7>;
brcm,pull =3D <0x2 0x0>;
phandle =3D <0x50>;
};
uart0_gpio32 {
brcm,pins =3D <0x20 0x21>;
brcm,function =3D <0x7>;
brcm,pull =3D <0x0 0x2>;
phandle =3D <0x51>;
};
uart0_gpio36 {
brcm,pins =3D <0x24 0x25>;
brcm,function =3D <0x6>;
phandle =3D <0x52>;
};
uart0_ctsrts_gpio38 {
brcm,pins =3D <0x26 0x27>;
brcm,function =3D <0x6>;
phandle =3D <0x53>;
};
uart1_gpio14 {
brcm,pins =3D <0xe 0xf>;
brcm,function =3D <0x2>;
phandle =3D <0x54>;
};
uart1_ctsrts_gpio16 {
brcm,pins =3D <0x10 0x11>;
brcm,function =3D <0x2>;
phandle =3D <0x55>;
};
uart1_gpio32 {
brcm,pins =3D <0x20 0x21>;
brcm,function =3D <0x2>;
phandle =3D <0x56>;
};
uart1_ctsrts_gpio30 {
brcm,pins =3D <0x1e 0x1f>;
brcm,function =3D <0x2>;
phandle =3D <0x57>;
};
uart1_gpio40 {
brcm,pins =3D <0x28 0x29>;
brcm,function =3D <0x2>;
phandle =3D <0x58>;
};
uart1_ctsrts_gpio42 {
brcm,pins =3D <0x2a 0x2b>;
brcm,function =3D <0x2>;
phandle =3D <0x59>;
};
i2c_slave_gpio18 {
brcm,pins =3D <0x12 0x13 0x14 0x15>;
brcm,function =3D <0x7>;
phandle =3D <0x5a>;
};
jtag_gpio4 {
brcm,pins =3D <0x4 0x5 0x6 0xc 0xd>;
brcm,function =3D <0x2>;
phandle =3D <0x5b>;
};
pwm0_gpio12 {
brcm,pins =3D <0xc>;
brcm,function =3D <0x4>;
phandle =3D <0x5c>;
};
pwm0_gpio18 {
brcm,pins =3D <0x12>;
brcm,function =3D <0x2>;
phandle =3D <0x5d>;
};
pwm0_gpio40 {
brcm,pins =3D <0x28>;
brcm,function =3D <0x4>;
phandle =3D <0x5e>;
};
pwm1_gpio13 {
brcm,pins =3D <0xd>;
brcm,function =3D <0x4>;
phandle =3D <0x5f>;
};
pwm1_gpio19 {
brcm,pins =3D <0x13>;
brcm,function =3D <0x2>;
phandle =3D <0x60>;
};
pwm1_gpio41 {
brcm,pins =3D <0x29>;
brcm,function =3D <0x4>;
phandle =3D <0x61>;
};
pwm1_gpio45 {
brcm,pins =3D <0x2d>;
brcm,function =3D <0x4>;
phandle =3D <0x62>;
};
dpi_18bit_cpadhi_gpio0 {
brcm,pins =3D <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xc 0xd 0xe 0xf =
0x10 0x11 0x14 0x15 0x16 0x17 0x18 0x19>;
brcm,function =3D <0x6>;
brcm,pull =3D <0x0>;
phandle =3D <0x63>;
};
dpi_18bit_cpadhi_gpio2 {
brcm,pins =3D <0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xc 0xd 0xe 0xf 0x10 0x11 =
0x14 0x15 0x16 0x17 0x18 0x19>;
brcm,function =3D <0x6>;
phandle =3D <0x64>;
};
dpi_18bit_gpio0 {
brcm,pins =3D <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd =
0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15>;
brcm,function =3D <0x6>;
phandle =3D <0x65>;
};
dpi_18bit_gpio2 {
brcm,pins =3D <0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf =
0x10 0x11 0x12 0x13 0x14 0x15>;
brcm,function =3D <0x6>;
phandle =3D <0x66>;
};
dpi_16bit_gpio0 {
brcm,pins =3D <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd =
0xe 0xf 0x10 0x11 0x12 0x13>;
brcm,function =3D <0x6>;
phandle =3D <0x67>;
};
dpi_16bit_gpio2 {
brcm,pins =3D <0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf =
0x10 0x11 0x12 0x13>;
brcm,function =3D <0x6>;
phandle =3D <0x68>;
};
dpi_16bit_cpadhi_gpio0 {
brcm,pins =3D <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0xc 0xd 0xe 0xf 0x10 =
0x11 0x14 0x15 0x16 0x17 0x18>;
brcm,function =3D <0x6>;
phandle =3D <0x69>;
};
dpi_16bit_cpadhi_gpio2 {
brcm,pins =3D <0x2 0x3 0x4 0x5 0x6 0x7 0x8 0xc 0xd 0xe 0xf 0x10 0x11 =
0x14 0x15 0x16 0x17 0x18>;
brcm,function =3D <0x6>;
phandle =3D <0x6a>;
};
gpioout {
brcm,pins =3D <0x6>;
brcm,function =3D <0x1>;
phandle =3D <0x6b>;
};
alt0 {
brcm,pins =3D <0x4 0x5 0x7 0x8 0x9 0xa 0xb>;
brcm,function =3D <0x4>;
phandle =3D <0x6c>;
};
spi0_pins {
brcm,pins =3D <0x9 0xa 0xb>;
brcm,function =3D <0x4>;
phandle =3D <0xc>;
};
spi0_cs_pins {
brcm,pins =3D <0x8 0x7>;
brcm,function =3D <0x1>;
phandle =3D <0xd>;
};
i2c0 {
brcm,pins =3D <0x0 0x1>;
brcm,function =3D <0x4>;
phandle =3D <0x6d>;
};
i2c1 {
brcm,pins =3D <0x2 0x3>;
brcm,function =3D <0x4>;
phandle =3D <0x11>;
};
i2s {
brcm,pins =3D <0x12 0x13 0x14 0x15>;
brcm,function =3D <0x4>;
phandle =3D <0xb>;
};
audio_pins {
brcm,pins;
brcm,function;
phandle =3D <0x1c>;
};
};
serial@7e201000 {
compatible =3D "arm,pl011", "arm,primecell";
reg =3D <0x7e201000 0x200>;
interrupts =3D <0x2 0x19>;
clocks =3D <0x8 0x13 0x8 0x14>;
clock-names =3D "uartclk", "apb_pclk";
arm,primecell-periphid =3D <0x241011>;
cts-event-workaround;
skip-init;
status =3D "okay";
phandle =3D <0x22>;
};
mmc@7e202000 {
compatible =3D "brcm,bcm2835-sdhost";
reg =3D <0x7e202000 0x100>;
interrupts =3D <0x2 0x18>;
clocks =3D <0x8 0x14>;
status =3D "disabled";
dmas =3D <0x9 0x2000000d>;
dma-names =3D "rx-tx";
bus-width =3D <0x4>;
brcm,overclock-50 =3D <0x0>;
brcm,pio-limit =3D <0x1>;
firmware =3D <0x6>;
pinctrl-names =3D "default";
pinctrl-0 =3D <0xa>;
phandle =3D <0x2a>;
};
i2s@7e203000 {
compatible =3D "brcm,bcm2835-i2s";
reg =3D <0x7e203000 0x24>;
clocks =3D <0x8 0x1f>;
status =3D "disabled";
dmas =3D <0x9 0x2 0x9 0x3>;
dma-names =3D "tx", "rx";
#sound-dai-cells =3D <0x0>;
pinctrl-names =3D "default";
pinctrl-0 =3D <0xb>;
phandle =3D <0x24>;
};
spi@7e204000 {
compatible =3D "brcm,bcm2835-spi";
reg =3D <0x7e204000 0x200>;
interrupts =3D <0x2 0x16>;
clocks =3D <0x8 0x14>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
status =3D "okay";
dmas =3D <0x9 0x6 0x9 0x7>;
dma-names =3D "tx", "rx";
pinctrl-names =3D "default";
pinctrl-0 =3D <0xc 0xd>;
cs-gpios =3D <0x7 0x8 0x1 0x7 0x7 0x1>;
phandle =3D <0x25>;
spidev@0 {
compatible =3D "spidev";
reg =3D <0x0>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
spi-max-frequency =3D <0x7735940>;
phandle =3D <0x6e>;
};
spidev@1 {
compatible =3D "spidev";
reg =3D <0x1>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
spi-max-frequency =3D <0x7735940>;
phandle =3D <0x6f>;
};
};
i2c@7e205000 {
compatible =3D "brcm,bcm2835-i2c";
reg =3D <0x7e205000 0x200>;
interrupts =3D <0x2 0x15>;
clocks =3D <0x8 0x14>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
status =3D "disabled";
clock-frequency =3D <0x186a0>;
phandle =3D <0x18>;
};
dpi@7e208000 {
compatible =3D "brcm,bcm2835-dpi";
reg =3D <0x7e208000 0x8c>;
clocks =3D <0x8 0x14 0x8 0x2c>;
clock-names =3D "core", "pixel";
status =3D "disabled";
phandle =3D <0x70>;
};
dsi@7e209000 {
compatible =3D "brcm,bcm2835-dsi0";
reg =3D <0x7e209000 0x78>;
interrupts =3D <0x2 0x4>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
#clock-cells =3D <0x1>;
clocks =3D <0x8 0x20 0x8 0x2f 0x8 0x31>;
clock-names =3D "phy", "escape", "pixel";
clock-output-names =3D "dsi0_byte", "dsi0_ddr2", "dsi0_ddr";
status =3D "disabled";
power-domains =3D <0xe 0x11>;
phandle =3D <0x4>;
};
aux@7e215000 {
compatible =3D "brcm,bcm2835-aux";
#clock-cells =3D <0x1>;
reg =3D <0x7e215000 0x8>;
clocks =3D <0x8 0x14>;
phandle =3D <0xf>;
};
serial@7e215040 {
compatible =3D "brcm,bcm2835-aux-uart";
reg =3D <0x7e215040 0x40>;
interrupts =3D <0x1 0x1d>;
clocks =3D <0xf 0x0>;
status =3D "disabled";
skip-init;
phandle =3D <0x23>;
};
spi@7e215080 {
compatible =3D "brcm,bcm2835-aux-spi";
reg =3D <0x7e215080 0x40>;
interrupts =3D <0x1 0x1d>;
clocks =3D <0xf 0x1>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
status =3D "disabled";
phandle =3D <0x71>;
};
spi@7e2150c0 {
compatible =3D "brcm,bcm2835-aux-spi";
reg =3D <0x7e2150c0 0x40>;
interrupts =3D <0x1 0x1d>;
clocks =3D <0xf 0x2>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
status =3D "disabled";
phandle =3D <0x72>;
};
pwm@7e20c000 {
compatible =3D "brcm,bcm2835-pwm";
reg =3D <0x7e20c000 0x28>;
clocks =3D <0x8 0x1e>;
assigned-clocks =3D <0x8 0x1e>;
assigned-clock-rates =3D <0x989680>;
#pwm-cells =3D <0x2>;
status =3D "disabled";
phandle =3D <0x73>;
};
mmc@7e300000 {
compatible =3D "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
reg =3D <0x7e300000 0x100>;
interrupts =3D <0x2 0x1e>;
clocks =3D <0x8 0x1c>;
status =3D "okay";
dmas =3D <0x9 0xb>;
dma-names =3D "rx-tx";
brcm,overclock-50 =3D <0x0>;
pinctrl-names =3D "default";
pinctrl-0 =3D <0x8d>;
bus-width =3D <0x4>;
phandle =3D <0x2b>;
};
hvs@7e400000 {
compatible =3D "brcm,bcm2835-hvs";
reg =3D <0x7e400000 0x6000>;
interrupts =3D <0x2 0x1>;
status =3D "disabled";
phandle =3D <0x74>;
};
dsi@7e700000 {
compatible =3D "brcm,bcm2835-dsi1";
reg =3D <0x7e700000 0x8c>;
interrupts =3D <0x2 0xc>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
#clock-cells =3D <0x1>;
clocks =3D <0x8 0x23 0x8 0x30 0x8 0x32>;
clock-names =3D "phy", "escape", "pixel";
clock-output-names =3D "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";
status =3D "disabled";
power-domains =3D <0xe 0x12>;
phandle =3D <0x5>;
};
i2c@7e804000 {
compatible =3D "brcm,bcm2835-i2c";
reg =3D <0x7e804000 0x1000>;
interrupts =3D <0x2 0x15>;
clocks =3D <0x8 0x14>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
status =3D "okay";
pinctrl-names =3D "default";
pinctrl-0 =3D <0x11>;
clock-frequency =3D <0x186a0>;
phandle =3D <0x27>;
};
usb@7e980000 {
compatible =3D "brcm,bcm2708-usb";
reg =3D <0x7e980000 0x10000 0x7e006000 0x1000>;
interrupts =3D <0x1 0x9 0x2 0x0>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
clocks =3D <0x12>;
clock-names =3D "otg";
phys =3D <0x13>;
phy-names =3D "usb2-phy";
interrupt-names =3D "usb", "soft";
power-domains =3D <0xe 0x6>;
phandle =3D <0x75>;
};
dma@7e007000 {
compatible =3D "brcm,bcm2835-dma";
reg =3D <0x7e007000 0xf00>;
interrupts =3D <0x1 0x10 0x1 0x11 0x1 0x12 0x1 0x13 0x1 0x14 0x1 0x15 =
0x1 0x16 0x1 0x17 0x1 0x18 0x1 0x19 0x1 0x1a 0x1 0x1b 0x1 0x1b 0x1 0x1b =
0x1 0x1b 0x1 0x1c>;
interrupt-names =3D "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", =
"dma6", "dma7", "dma8", "dma9", "dma10", "dma11", "dma12", "dma13", =
"dma14", "dma-shared-all";
#dma-cells =3D <0x1>;
brcm,dma-channel-mask =3D <0x7f35>;
phandle =3D <0x9>;
};
interrupt-controller@7e00b200 {
compatible =3D "brcm,bcm2836-armctrl-ic";
reg =3D <0x7e00b200 0x200>;
interrupt-controller;
#interrupt-cells =3D <0x2>;
interrupt-parent =3D <0x14>;
interrupts =3D <0x8 0x4>;
phandle =3D <0x1>;
};
watchdog@7e100000 {
compatible =3D "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
#power-domain-cells =3D <0x1>;
#reset-cells =3D <0x1>;
reg =3D <0x7e100000 0x114 0x7e00a000 0x24>;
reg-names =3D "pm", "asb";
clocks =3D <0x8 0x15 0x8 0x1d 0x8 0x17 0x8 0x16>;
clock-names =3D "v3d", "peri_image", "h264", "isp";
system-power-controller;
phandle =3D <0x28>;
};
rng@7e104000 {
compatible =3D "brcm,bcm2835-rng";
reg =3D <0x7e104000 0x10>;
interrupts =3D <0x2 0x1d>;
phandle =3D <0x29>;
};
pixelvalve@7e206000 {
compatible =3D "brcm,bcm2835-pixelvalve0";
reg =3D <0x7e206000 0x100>;
interrupts =3D <0x2 0xd>;
status =3D "disabled";
phandle =3D <0x76>;
};
pixelvalve@7e207000 {
compatible =3D "brcm,bcm2835-pixelvalve1";
reg =3D <0x7e207000 0x100>;
interrupts =3D <0x2 0xe>;
status =3D "disabled";
phandle =3D <0x77>;
};
thermal@7e212000 {
compatible =3D "brcm,bcm2837-thermal";
reg =3D <0x7e212000 0x8>;
clocks =3D <0x8 0x1b>;
#thermal-sensor-cells =3D <0x0>;
status =3D "okay";
phandle =3D <0x2>;
};
i2c@7e805000 {
compatible =3D "brcm,bcm2835-i2c";
reg =3D <0x7e805000 0x1000>;
interrupts =3D <0x2 0x15>;
clocks =3D <0x8 0x14>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
status =3D "disabled";
clock-frequency =3D <0x186a0>;
phandle =3D <0x16>;
};
vec@7e806000 {
compatible =3D "brcm,bcm2835-vec";
reg =3D <0x7e806000 0x1000>;
clocks =3D <0x15 0xf>;
interrupts =3D <0x2 0x1b>;
status =3D "disabled";
power-domains =3D <0xe 0x7>;
phandle =3D <0x78>;
};
pixelvalve@7e807000 {
compatible =3D "brcm,bcm2835-pixelvalve2";
reg =3D <0x7e807000 0x100>;
interrupts =3D <0x2 0xa>;
status =3D "disabled";
phandle =3D <0x79>;
};
hdmi@7e902000 {
compatible =3D "brcm,bcm2835-hdmi";
reg =3D <0x7e902000 0x600 0x7e808000 0x100>;
interrupts =3D <0x2 0x8 0x2 0x9>;
ddc =3D <0x16>;
clocks =3D <0x15 0x9 0x15 0xd>;
clock-names =3D "pixel", "hdmi";
dmas =3D <0x9 0x9000011>;
dma-names =3D "audio-rx";
status =3D "disabled";
reg-names =3D "hdmi", "hd";
power-domains =3D <0xe 0x5>;
hpd-gpios =3D <0x17 0x0 0x1>;
phandle =3D <0x2e>;
};
v3d@7ec00000 {
compatible =3D "brcm,vc4-v3d";
reg =3D <0x7ec00000 0x1000>;
interrupts =3D <0x1 0xa>;
power-domains =3D <0xe 0xa>;
status =3D "disabled";
phandle =3D <0x7a>;
};
gpu {
compatible =3D "brcm,bcm2835-vc4";
status =3D "disabled";
raspberrypi,firmware =3D <0x6>;
phandle =3D <0x7b>;
};
local_intc@40000000 {
compatible =3D "brcm,bcm2836-l1-intc";
reg =3D <0x40000000 0x100>;
interrupt-controller;
#interrupt-cells =3D <0x2>;
interrupt-parent =3D <0x14>;
phandle =3D <0x14>;
};
mmcnr@7e300000 {
compatible =3D "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
reg =3D <0x7e300000 0x100>;
interrupts =3D <0x2 0x1e>;
clocks =3D <0x8 0x1c>;
dmas =3D <0x9 0xb>;
dma-names =3D "rx-tx";
brcm,overclock-50 =3D <0x0>;
non-removable;
status =3D "disabled";
phandle =3D <0x2c>;
};
firmwarekms@7e600000 {
compatible =3D "raspberrypi,rpi-firmware-kms";
reg =3D <0x7e600000 0x100>;
interrupts =3D <0x2 0x10>;
brcm,firmware =3D <0x6>;
status =3D "disabled";
phandle =3D <0x7c>;
};
smi@7e600000 {
compatible =3D "brcm,bcm2835-smi";
reg =3D <0x7e600000 0x100>;
interrupts =3D <0x2 0x10>;
clocks =3D <0x8 0x2a>;
assigned-clocks =3D <0x8 0x2a>;
assigned-clock-rates =3D <0x7735940>;
dmas =3D <0x9 0x4>;
dma-names =3D "rx-tx";
status =3D "disabled";
phandle =3D <0x7d>;
};
csi@7e800000 {
compatible =3D "brcm,bcm2835-unicam";
reg =3D <0x7e800000 0x800 0x7e802000 0x4>;
interrupts =3D <0x2 0x6>;
clocks =3D <0x8 0x2d 0x15 0x4>;
clock-names =3D "lp", "vpu";
power-domains =3D <0xe 0xc>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
#clock-cells =3D <0x1>;
status =3D "disabled";
brcm,num-data-lanes =3D <0x2>;
phandle =3D <0x7e>;
};
csi@7e801000 {
compatible =3D "brcm,bcm2835-unicam";
reg =3D <0x7e801000 0x800 0x7e802004 0x4>;
interrupts =3D <0x2 0x7>;
clocks =3D <0x8 0x2e 0x15 0x4>;
clock-names =3D "lp", "vpu";
power-domains =3D <0xe 0xd>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
#clock-cells =3D <0x1>;
status =3D "disabled";
brcm,num-data-lanes =3D <0x4>;
phandle =3D <0x7f>;
};
axiperf {
compatible =3D "brcm,bcm2835-axiperf";
reg =3D <0x7e009800 0x100 0x7ee08000 0x100>;
firmware =3D <0x6>;
status =3D "disabled";
phandle =3D <0x2d>;
};
i2c0mux {
compatible =3D "i2c-mux-pinctrl";
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
i2c-parent =3D <0x18>;
status =3D "disabled";
pinctrl-names =3D "i2c0", "i2c_csi_dsi";
pinctrl-0 =3D <0x19>;
pinctrl-1 =3D <0x1a>;
phandle =3D <0x26>;
i2c@0 {
reg =3D <0x0>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
phandle =3D <0x80>;
};
i2c@1 {
reg =3D <0x1>;
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
phandle =3D <0x81>;
};
};
firmware {
compatible =3D "raspberrypi,bcm2835-firmware", "simple-mfd";
#address-cells =3D <0x1>;
#size-cells =3D <0x1>;
mboxes =3D <0x1b>;
dma-ranges;
phandle =3D <0x6>;
clocks {
compatible =3D "raspberrypi,firmware-clocks";
#clock-cells =3D <0x1>;
phandle =3D <0x15>;
};
vcio {
compatible =3D "raspberrypi,vcio";
phandle =3D <0x82>;
};
expgpio {
compatible =3D "raspberrypi,firmware-gpio";
gpio-controller;
#gpio-cells =3D <0x2>;
gpio-line-names =3D "HDMI_HPD_N", "EMMC_EN_N", "NC", "NC", "NC", "NC", =
"NC", "NC";
status =3D "okay";
phandle =3D <0x17>;
};
};
power {
compatible =3D "raspberrypi,bcm2835-power";
firmware =3D <0x6>;
#power-domain-cells =3D <0x1>;
phandle =3D <0xe>;
};
mailbox@7e00b840 {
compatible =3D "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
reg =3D <0x7e00b840 0x3c>;
interrupts =3D <0x0 0x2>;
pinctrl-names =3D "default";
pinctrl-0 =3D <0x1c>;
phandle =3D <0x83>;
};
gpiomem {
compatible =3D "brcm,bcm2835-gpiomem";
reg =3D <0x7e200000 0x1000>;
};
fb {
compatible =3D "brcm,bcm2708-fb";
firmware =3D <0x6>;
status =3D "okay";
phandle =3D <0x84>;
};
sound {
status =3D "disabled";
phandle =3D <0x85>;
};
virtgpio {
compatible =3D "brcm,bcm2835-virtgpio";
gpio-controller;
#gpio-cells =3D <0x2>;
firmware =3D <0x6>;
status =3D "okay";
phandle =3D <0x33>;
};
};
clocks {
clk-osc {
compatible =3D "fixed-clock";
#clock-cells =3D <0x0>;
clock-output-names =3D "osc";
clock-frequency =3D <0x124f800>;
phandle =3D <0x3>;
};
clk-usb {
compatible =3D "fixed-clock";
#clock-cells =3D <0x0>;
clock-output-names =3D "otg";
clock-frequency =3D <0x1c9c3800>;
phandle =3D <0x12>;
};
};
phy {
compatible =3D "usb-nop-xceiv";
#phy-cells =3D <0x0>;
phandle =3D <0x13>;
};
arm-pmu {
compatible =3D "arm,cortex-a53-pmu", "arm,cortex-a7-pmu";
interrupt-parent =3D <0x14>;
interrupts =3D <0x9 0x4>;
};
timer {
compatible =3D "arm,armv7-timer";
interrupt-parent =3D <0x14>;
interrupts =3D <0x0 0x4 0x1 0x4 0x3 0x4 0x2 0x4>;
always-on;
};
cpus {
#address-cells =3D <0x1>;
#size-cells =3D <0x0>;
enable-method =3D "brcm,bcm2836-smp";
phandle =3D <0x86>;
cpu@0 {
clock-frequency =3D <0x47868c00>;
device_type =3D "cpu";
compatible =3D "arm,cortex-a53";
reg =3D <0x0>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x0 0xd8>;
d-cache-size =3D <0x8000>;
d-cache-line-size =3D <0x40>;
d-cache-sets =3D <0x80>;
i-cache-size =3D <0x8000>;
i-cache-line-size =3D <0x40>;
i-cache-sets =3D <0x100>;
next-level-cache =3D <0x1d>;
phandle =3D <0x1e>;
};
cpu@1 {
clock-frequency =3D <0x47868c00>;
device_type =3D "cpu";
compatible =3D "arm,cortex-a53";
reg =3D <0x1>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x0 0xe0>;
d-cache-size =3D <0x8000>;
d-cache-line-size =3D <0x40>;
d-cache-sets =3D <0x80>;
i-cache-size =3D <0x8000>;
i-cache-line-size =3D <0x40>;
i-cache-sets =3D <0x100>;
next-level-cache =3D <0x1d>;
phandle =3D <0x1f>;
};
cpu@2 {
clock-frequency =3D <0x47868c00>;
device_type =3D "cpu";
compatible =3D "arm,cortex-a53";
reg =3D <0x2>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x0 0xe8>;
d-cache-size =3D <0x8000>;
d-cache-line-size =3D <0x40>;
d-cache-sets =3D <0x80>;
i-cache-size =3D <0x8000>;
i-cache-line-size =3D <0x40>;
i-cache-sets =3D <0x100>;
next-level-cache =3D <0x1d>;
phandle =3D <0x20>;
};
cpu@3 {
clock-frequency =3D <0x47868c00>;
device_type =3D "cpu";
compatible =3D "arm,cortex-a53";
reg =3D <0x3>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x0 0xf0>;
d-cache-size =3D <0x8000>;
d-cache-line-size =3D <0x40>;
d-cache-sets =3D <0x80>;
i-cache-size =3D <0x8000>;
i-cache-line-size =3D <0x40>;
i-cache-sets =3D <0x100>;
next-level-cache =3D <0x1d>;
phandle =3D <0x21>;
};
l2-cache0 {
compatible =3D "cache";
cache-size =3D <0x80000>;
cache-line-size =3D <0x40>;
cache-sets =3D <0x200>;
cache-level =3D <0x2>;
phandle =3D <0x1d>;
};
};
cam1_regulator {
compatible =3D "regulator-fixed";
regulator-name =3D "cam1-reg";
enable-active-high;
status =3D "disabled";
gpio =3D <0x7 0x3 0x0>;
phandle =3D <0x32>;
};
cam1_clk {
compatible =3D "fixed-clock";
#clock-cells =3D <0x0>;
status =3D "disabled";
phandle =3D <0x87>;
};
cam0_regulator {
compatible =3D "regulator-fixed";
regulator-name =3D "cam0-reg";
enable-active-high;
status =3D "disabled";
gpio =3D <0x7 0x1f 0x0>;
phandle =3D <0x31>;
};
cam0_clk {
compatible =3D "fixed-clock";
#clock-cells =3D <0x0>;
status =3D "disabled";
phandle =3D <0x88>;
};
cam_dummy_reg {
compatible =3D "regulator-fixed";
regulator-name =3D "cam-dummy-reg";
status =3D "okay";
phandle =3D <0x89>;
};
__overrides__ {
i2c_arm_baudrate =3D [00 00 00 27 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e =
63 79 3a 30 00];
i2c_baudrate =3D [00 00 00 27 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 =
79 3a 30 00];
i2c_arm =3D [00 00 00 27 73 74 61 74 75 73 00];
i2c =3D [00 00 00 27 73 74 61 74 75 73 00];
i2c_vc_baudrate =3D [00 00 00 18 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e =
63 79 3a 30 00];
i2c_vc =3D [00 00 00 18 73 74 61 74 75 73 00 00 00 00 26 73 74 61 74 75 =
73 00];
cam0-pwdn-ctrl;
cam0-pwdn;
cam0-led-ctrl;
cam0-led;
arm_freq =3D <0x1e 0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a =
0x30000000 0x1f636c 0x6f636b2d 0x66726571 0x75656e63 0x793a3000 0x20 =
0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a 0x30000000 0x21636c =
0x6f636b2d 0x66726571 0x75656e63 0x793a3000>;
cache_line_size;
uart0 =3D [00 00 00 22 73 74 61 74 75 73 00];
uart1 =3D [00 00 00 23 73 74 61 74 75 73 00];
i2s =3D [00 00 00 24 73 74 61 74 75 73 00];
spi =3D [00 00 00 25 73 74 61 74 75 73 00];
i2c0 =3D [00 00 00 18 73 74 61 74 75 73 00 00 00 00 26 73 74 61 74 75 73 =
00];
i2c1 =3D [00 00 00 27 73 74 61 74 75 73 00];
i2c0_baudrate =3D [00 00 00 18 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 =
79 3a 30 00];
i2c1_baudrate =3D [00 00 00 27 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 =
79 3a 30 00];
watchdog =3D [00 00 00 28 73 74 61 74 75 73 00];
random =3D [00 00 00 29 73 74 61 74 75 73 00];
sd_overclock =3D <0x2a 0x6272636d 0x2c6f7665 0x72636c6f 0x636b2d35 =
0x303a3000>;
sd_force_pio =3D <0x2a 0x6272636d 0x2c666f72 0x63652d70 0x696f3f00>;
sd_pio_limit =3D [00 00 00 2a 62 72 63 6d 2c 70 69 6f 2d 6c 69 6d 69 74 =
3a 30 00];
sd_debug =3D [00 00 00 2a 62 72 63 6d 2c 64 65 62 75 67 00];
sdio_overclock =3D <0x2b 0x6272636d 0x2c6f7665 0x72636c6f 0x636b2d35 =
0x303a3000 0x2c 0x6272636d 0x2c6f7665 0x72636c6f 0x636b2d35 0x303a3000>;
axiperf =3D [00 00 00 2d 73 74 61 74 75 73 00];
hdmi =3D [00 00 00 2e 73 74 61 74 75 73 00];
i2c2_iknowwhatimdoing =3D [00 00 00 16 73 74 61 74 75 73 00];
i2c2_baudrate =3D [00 00 00 16 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 =
79 3a 30 00];
sd =3D [00 00 00 2a 73 74 61 74 75 73 00];
sd_poll_once =3D [00 00 00 2a 6e 6f 6e 2d 72 65 6d 6f 76 61 62 6c 65 3f =
00];
audio =3D [00 00 00 2f 62 6f 6f 74 61 72 67 73 7b 6f 6e 3d 27 73 6e 64 =
5f 62 63 6d 32 38 33 35 2e 65 6e 61 62 6c 65 5f 68 64 6d 69 3d 31 27 2c =
6f 66 66 3d 27 73 6e 64 5f 62 63 6d 32 38 33 35 2e 65 6e 61 62 6c 65 5f =
68 64 6d 69 3d 30 27 7d 00];
act_led_gpio =3D <0x30 0x6770696f 0x733a3400>;
act_led_activelow =3D <0x30 0x6770696f 0x733a3800>;
act_led_trigger =3D [00 00 00 30 6c 69 6e 75 78 2c 64 65 66 61 75 6c 74 =
2d 74 72 69 67 67 65 72 00];
cam0_reg =3D [00 00 00 31 73 74 61 74 75 73 00];
cam0_reg_gpio =3D [00 00 00 31 67 70 69 6f 3a 34 00];
cam1_reg =3D [00 00 00 32 73 74 61 74 75 73 00];
cam1_reg_gpio =3D [00 00 00 32 67 70 69 6f 3a 34 00];
};
leds {
compatible =3D "gpio-leds";
phandle =3D <0x8a>;
led-act {
label =3D "ACT";
default-state =3D "off";
linux,default-trigger =3D "mmc0";
gpios =3D <0x33 0x0 0x0>;
phandle =3D <0x30>;
};
};
fixedregulator_3v3 {
compatible =3D "regulator-fixed";
regulator-always-on;
regulator-max-microvolt =3D <0x325aa0>;
regulator-min-microvolt =3D <0x325aa0>;
regulator-name =3D "3v3";
phandle =3D <0x8b>;
};
fixedregulator_5v0 {
compatible =3D "regulator-fixed";
regulator-always-on;
regulator-max-microvolt =3D <0x4c4b40>;
regulator-min-microvolt =3D <0x4c4b40>;
regulator-name =3D "5v0";
phandle =3D <0x8c>;
};
memory@0 {
device_type =3D "memory";
reg =3D <0x0 0x3b400000>;
};
__symbols__ {
i2c_arm =3D "/soc/i2c@7e804000";
i2c =3D "/soc/i2c@7e804000";
i2c_vc =3D "/soc/i2c0mux/i2c@0";
chosen =3D "/chosen";
rmem =3D "/reserved-memory";
cma =3D "/reserved-memory/linux,cma";
cpu_thermal =3D "/thermal-zones/cpu-thermal";
thermal_trips =3D "/thermal-zones/cpu-thermal/trips";
cooling_maps =3D "/thermal-zones/cpu-thermal/cooling-maps";
soc =3D "/soc";
txp =3D "/soc/txp@7e004000";
clocks =3D "/soc/cprman@7e101000";
mailbox =3D "/soc/mailbox@7e00b880";
gpio =3D "/soc/gpio@7e200000";
dpi_gpio0 =3D "/soc/gpio@7e200000/dpi_gpio0";
emmc_gpio22 =3D "/soc/gpio@7e200000/emmc_gpio22";
emmc_gpio34 =3D "/soc/gpio@7e200000/emmc_gpio34";
emmc_gpio48 =3D "/soc/gpio@7e200000/emmc_gpio48";
gpclk0_gpio4 =3D "/soc/gpio@7e200000/gpclk0_gpio4";
gpclk1_gpio5 =3D "/soc/gpio@7e200000/gpclk1_gpio5";
gpclk1_gpio42 =3D "/soc/gpio@7e200000/gpclk1_gpio42";
gpclk1_gpio44 =3D "/soc/gpio@7e200000/gpclk1_gpio44";
gpclk2_gpio6 =3D "/soc/gpio@7e200000/gpclk2_gpio6";
gpclk2_gpio43 =3D "/soc/gpio@7e200000/gpclk2_gpio43";
i2c0_gpio0 =3D "/soc/gpio@7e200000/i2c0_gpio0";
i2c0_gpio28 =3D "/soc/gpio@7e200000/i2c0_gpio28";
i2c0_gpio44 =3D "/soc/gpio@7e200000/i2c0_gpio44";
i2c1_gpio2 =3D "/soc/gpio@7e200000/i2c1_gpio2";
i2c1_gpio44 =3D "/soc/gpio@7e200000/i2c1_gpio44";
jtag_gpio22 =3D "/soc/gpio@7e200000/jtag_gpio22";
pcm_gpio18 =3D "/soc/gpio@7e200000/pcm_gpio18";
pcm_gpio28 =3D "/soc/gpio@7e200000/pcm_gpio28";
sdhost_gpio48 =3D "/soc/gpio@7e200000/sdhost_gpio48";
spi0_gpio7 =3D "/soc/gpio@7e200000/spi0_gpio7";
spi0_gpio35 =3D "/soc/gpio@7e200000/spi0_gpio35";
spi1_gpio16 =3D "/soc/gpio@7e200000/spi1_gpio16";
spi2_gpio40 =3D "/soc/gpio@7e200000/spi2_gpio40";
uart0_gpio14 =3D "/soc/gpio@7e200000/uart0_gpio14";
uart0_ctsrts_gpio16 =3D "/soc/gpio@7e200000/uart0_ctsrts_gpio16";
uart0_ctsrts_gpio30 =3D "/soc/gpio@7e200000/uart0_ctsrts_gpio30";
uart0_gpio32 =3D "/soc/gpio@7e200000/uart0_gpio32";
uart0_gpio36 =3D "/soc/gpio@7e200000/uart0_gpio36";
uart0_ctsrts_gpio38 =3D "/soc/gpio@7e200000/uart0_ctsrts_gpio38";
uart1_gpio14 =3D "/soc/gpio@7e200000/uart1_gpio14";
uart1_ctsrts_gpio16 =3D "/soc/gpio@7e200000/uart1_ctsrts_gpio16";
uart1_gpio32 =3D "/soc/gpio@7e200000/uart1_gpio32";
uart1_ctsrts_gpio30 =3D "/soc/gpio@7e200000/uart1_ctsrts_gpio30";
uart1_gpio40 =3D "/soc/gpio@7e200000/uart1_gpio40";
uart1_ctsrts_gpio42 =3D "/soc/gpio@7e200000/uart1_ctsrts_gpio42";
i2c_slave_gpio18 =3D "/soc/gpio@7e200000/i2c_slave_gpio18";
jtag_gpio4 =3D "/soc/gpio@7e200000/jtag_gpio4";
pwm0_gpio12 =3D "/soc/gpio@7e200000/pwm0_gpio12";
pwm0_gpio18 =3D "/soc/gpio@7e200000/pwm0_gpio18";
pwm0_gpio40 =3D "/soc/gpio@7e200000/pwm0_gpio40";
pwm1_gpio13 =3D "/soc/gpio@7e200000/pwm1_gpio13";
pwm1_gpio19 =3D "/soc/gpio@7e200000/pwm1_gpio19";
pwm1_gpio41 =3D "/soc/gpio@7e200000/pwm1_gpio41";
pwm1_gpio45 =3D "/soc/gpio@7e200000/pwm1_gpio45";
dpi_18bit_cpadhi_gpio0 =3D "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio0";
dpi_18bit_cpadhi_gpio2 =3D "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio2";
dpi_18bit_gpio0 =3D "/soc/gpio@7e200000/dpi_18bit_gpio0";
dpi_18bit_gpio2 =3D "/soc/gpio@7e200000/dpi_18bit_gpio2";
dpi_16bit_gpio0 =3D "/soc/gpio@7e200000/dpi_16bit_gpio0";
dpi_16bit_gpio2 =3D "/soc/gpio@7e200000/dpi_16bit_gpio2";
dpi_16bit_cpadhi_gpio0 =3D "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio0";
dpi_16bit_cpadhi_gpio2 =3D "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio2";
gpioout =3D "/soc/gpio@7e200000/gpioout";
alt0 =3D "/soc/gpio@7e200000/alt0";
spi0_pins =3D "/soc/gpio@7e200000/spi0_pins";
spi0_cs_pins =3D "/soc/gpio@7e200000/spi0_cs_pins";
i2c0_pins =3D "/soc/gpio@7e200000/i2c0";
i2c1_pins =3D "/soc/gpio@7e200000/i2c1";
i2s_pins =3D "/soc/gpio@7e200000/i2s";
audio_pins =3D "/soc/gpio@7e200000/audio_pins";
uart0 =3D "/soc/serial@7e201000";
sdhost =3D "/soc/mmc@7e202000";
i2s =3D "/soc/i2s@7e203000";
spi0 =3D "/soc/spi@7e204000";
spi =3D "/soc/spi@7e204000";
spidev0 =3D "/soc/spi@7e204000/spidev@0";
spidev1 =3D "/soc/spi@7e204000/spidev@1";
i2c0if =3D "/soc/i2c@7e205000";
dpi =3D "/soc/dpi@7e208000";
dsi0 =3D "/soc/dsi@7e209000";
aux =3D "/soc/aux@7e215000";
uart1 =3D "/soc/serial@7e215040";
spi1 =3D "/soc/spi@7e215080";
spi2 =3D "/soc/spi@7e2150c0";
pwm =3D "/soc/pwm@7e20c000";
mmc =3D "/soc/mmc@7e300000";
sdhci =3D "/soc/mmc@7e300000";
hvs =3D "/soc/hvs@7e400000";
dsi1 =3D "/soc/dsi@7e700000";
i2c1 =3D "/soc/i2c@7e804000";
usb =3D "/soc/usb@7e980000";
dma =3D "/soc/dma@7e007000";
intc =3D "/soc/interrupt-controller@7e00b200";
watchdog =3D "/soc/watchdog@7e100000";
pm =3D "/soc/watchdog@7e100000";
random =3D "/soc/rng@7e104000";
pixelvalve0 =3D "/soc/pixelvalve@7e206000";
pixelvalve1 =3D "/soc/pixelvalve@7e207000";
thermal =3D "/soc/thermal@7e212000";
i2c2 =3D "/soc/i2c@7e805000";
vec =3D "/soc/vec@7e806000";
pixelvalve2 =3D "/soc/pixelvalve@7e807000";
hdmi =3D "/soc/hdmi@7e902000";
v3d =3D "/soc/v3d@7ec00000";
vc4 =3D "/soc/gpu";
local_intc =3D "/soc/local_intc@40000000";
mmcnr =3D "/soc/mmcnr@7e300000";
firmwarekms =3D "/soc/firmwarekms@7e600000";
smi =3D "/soc/smi@7e600000";
csi0 =3D "/soc/csi@7e800000";
csi1 =3D "/soc/csi@7e801000";
axiperf =3D "/soc/axiperf";
i2c0mux =3D "/soc/i2c0mux";
i2c0 =3D "/soc/i2c0mux/i2c@0";
i2c_csi_dsi =3D "/soc/i2c0mux/i2c@1";
firmware =3D "/soc/firmware";
firmware_clocks =3D "/soc/firmware/clocks";
vcio =3D "/soc/firmware/vcio";
expgpio =3D "/soc/firmware/expgpio";
power =3D "/soc/power";
vchiq =3D "/soc/mailbox@7e00b840";
fb =3D "/soc/fb";
sound =3D "/soc/sound";
virtgpio =3D "/soc/virtgpio";
clk_osc =3D "/clocks/clk-osc";
clk_usb =3D "/clocks/clk-usb";
usbphy =3D "/phy";
cpus =3D "/cpus";
cpu0 =3D "/cpus/cpu@0";
cpu1 =3D "/cpus/cpu@1";
cpu2 =3D "/cpus/cpu@2";
cpu3 =3D "/cpus/cpu@3";
l2 =3D "/cpus/l2-cache0";
cam1_reg =3D "/cam1_regulator";
cam1_clk =3D "/cam1_clk";
cam0_reg =3D "/cam0_regulator";
cam0_regulator =3D "/cam0_regulator";
cam0_clk =3D "/cam0_clk";
cam_dummy_reg =3D "/cam_dummy_reg";
leds =3D "/leds";
act_led =3D "/leds/led-act";
vdd_3v3_reg =3D "/fixedregulator_3v3";
vdd_5v0_reg =3D "/fixedregulator_5v0";
};
};
$=20
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