From owner-svn-src-head@FreeBSD.ORG Sat Feb 28 20:37:40 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 45B8C77C; Sat, 28 Feb 2015 20:37:40 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 16B62632; Sat, 28 Feb 2015 20:37:40 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t1SKbd87072219; Sat, 28 Feb 2015 20:37:39 GMT (envelope-from kib@FreeBSD.org) Received: (from kib@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t1SKbdTI072217; Sat, 28 Feb 2015 20:37:39 GMT (envelope-from kib@FreeBSD.org) Message-Id: <201502282037.t1SKbdTI072217@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: kib set sender to kib@FreeBSD.org using -f From: Konstantin Belousov Date: Sat, 28 Feb 2015 20:37:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r279406 - in head/sys: amd64/amd64 i386/i386 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 28 Feb 2015 20:37:40 -0000 Author: kib Date: Sat Feb 28 20:37:38 2015 New Revision: 279406 URL: https://svnweb.freebsd.org/changeset/base/279406 Log: Supposed fix for some SandyBridge mobile CPUs hang on AP startup when x2APIC mode is detected and enabled. Current theory is that switching the APIC mode while an IPI is in flight might be the issue. Postpone switching to x2APIC mode until we are guaranteed that all starting IPIs are already send and aknowledged. Use aps_ready signal as an indication that the BSP is done with us. Tested by: adrian Sponsored by: The FreeBSD Foundation MFC after: 2 months Modified: head/sys/amd64/amd64/mp_machdep.c head/sys/i386/i386/mp_machdep.c Modified: head/sys/amd64/amd64/mp_machdep.c ============================================================================== --- head/sys/amd64/amd64/mp_machdep.c Sat Feb 28 20:30:29 2015 (r279405) +++ head/sys/amd64/amd64/mp_machdep.c Sat Feb 28 20:37:38 2015 (r279406) @@ -705,12 +705,6 @@ init_secondary(void) wrmsr(MSR_STAR, msr); wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); - /* - * On real hardware, switch to x2apic mode if possible. - * Disable local APIC until BSP directed APs to run. - */ - lapic_xapic_mode(); - /* signal our startup to the BSP. */ mp_naps++; @@ -718,6 +712,14 @@ init_secondary(void) while (!aps_ready) ia32_pause(); + /* + * On real hardware, switch to x2apic mode if possible. Do it + * after aps_ready was signalled, to avoid manipulating the + * mode while BSP might still want to send some IPI to us + * (second startup IPI is ignored on modern hardware etc). + */ + lapic_xapic_mode(); + /* Initialize the PAT MSR. */ pmap_init_pat(); Modified: head/sys/i386/i386/mp_machdep.c ============================================================================== --- head/sys/i386/i386/mp_machdep.c Sat Feb 28 20:30:29 2015 (r279405) +++ head/sys/i386/i386/mp_machdep.c Sat Feb 28 20:37:38 2015 (r279406) @@ -719,12 +719,6 @@ init_secondary(void) load_cr0(cr0); CHECK_WRITE(0x38, 5); - /* - * On real hardware, switch to x2apic mode if possible. - * Disable local APIC until BSP directed APs to run. - */ - lapic_xapic_mode(); - /* signal our startup to the BSP. */ mp_naps++; CHECK_WRITE(0x39, 6); @@ -742,6 +736,14 @@ init_secondary(void) lidt(&r_idt); #endif + /* + * On real hardware, switch to x2apic mode if possible. Do it + * after aps_ready was signalled, to avoid manipulating the + * mode while BSP might still want to send some IPI to us + * (second startup IPI is ignored on modern hardware etc). + */ + lapic_xapic_mode(); + /* Initialize the PAT MSR if present. */ pmap_init_pat();