Date: Tue, 3 Mar 2020 15:12:01 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r358582 - in stable/11/sys: amd64/amd64 dev/cpuctl x86/acpica x86/include x86/x86 Message-ID: <202003031512.023FC133038966@repo.freebsd.org>
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Author: kib Date: Tue Mar 3 15:12:00 2020 New Revision: 358582 URL: https://svnweb.freebsd.org/changeset/base/358582 Log: MFC r358315: Fix IBRS for machines with IBRS_ALL capability. Modified: stable/11/sys/amd64/amd64/initcpu.c stable/11/sys/amd64/amd64/support.S stable/11/sys/dev/cpuctl/cpuctl.c stable/11/sys/x86/acpica/acpi_wakeup.c stable/11/sys/x86/include/x86_var.h stable/11/sys/x86/x86/cpu_machdep.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/amd64/amd64/initcpu.c ============================================================================== --- stable/11/sys/amd64/amd64/initcpu.c Tue Mar 3 15:07:48 2020 (r358581) +++ stable/11/sys/amd64/amd64/initcpu.c Tue Mar 3 15:12:00 2020 (r358582) @@ -245,7 +245,7 @@ initializecpu(void) wrmsr(MSR_EFER, msr); pg_nx = PG_NX; } - hw_ibrs_recalculate(); + hw_ibrs_recalculate(false); hw_ssb_recalculate(false); switch (cpu_vendor_id) { case CPU_VENDOR_AMD: Modified: stable/11/sys/amd64/amd64/support.S ============================================================================== --- stable/11/sys/amd64/amd64/support.S Tue Mar 3 15:07:48 2020 (r358581) +++ stable/11/sys/amd64/amd64/support.S Tue Mar 3 15:12:00 2020 (r358582) @@ -851,7 +851,7 @@ handle_ibrs_\l: /* all callers already saved %rax, %rdx, and %rcx */ ENTRY(handle_ibrs_entry) - cmpb $0,hw_ibrs_active(%rip) + cmpb $0,hw_ibrs_ibpb_active(%rip) je 1f movl $MSR_IA32_SPEC_CTRL,%ecx rdmsr Modified: stable/11/sys/dev/cpuctl/cpuctl.c ============================================================================== --- stable/11/sys/dev/cpuctl/cpuctl.c Tue Mar 3 15:07:48 2020 (r358581) +++ stable/11/sys/dev/cpuctl/cpuctl.c Tue Mar 3 15:12:00 2020 (r358582) @@ -536,8 +536,8 @@ cpuctl_do_eval_cpu_features(int cpu, struct thread *td set_cpu(cpu, td); identify_cpu1(); identify_cpu2(); - hw_ibrs_recalculate(); restore_cpu(oldcpu, is_bound, td); + hw_ibrs_recalculate(true); hw_ssb_recalculate(true); #ifdef __amd64__ pmap_allow_2m_x_ept_recalculate(); Modified: stable/11/sys/x86/acpica/acpi_wakeup.c ============================================================================== --- stable/11/sys/x86/acpica/acpi_wakeup.c Tue Mar 3 15:07:48 2020 (r358581) +++ stable/11/sys/x86/acpica/acpi_wakeup.c Tue Mar 3 15:12:00 2020 (r358582) @@ -227,7 +227,7 @@ acpi_sleep_machdep(struct acpi_softc *sc, int state) } #endif #ifdef __amd64__ - hw_ibrs_active = 0; + hw_ibrs_ibpb_active = 0; hw_ssb_active = 0; cpu_stdext_feature3 = 0; CPU_FOREACH(i) { Modified: stable/11/sys/x86/include/x86_var.h ============================================================================== --- stable/11/sys/x86/include/x86_var.h Tue Mar 3 15:07:48 2020 (r358581) +++ stable/11/sys/x86/include/x86_var.h Tue Mar 3 15:12:00 2020 (r358582) @@ -82,7 +82,7 @@ extern int _ugssel; extern int use_xsave; extern uint64_t xsave_mask; extern int pti; -extern int hw_ibrs_active; +extern int hw_ibrs_ibpb_active; extern int hw_mds_disable; extern int hw_ssb_active; extern int x86_taa_enable; @@ -135,7 +135,7 @@ int is_physical_memory(vm_paddr_t addr); int isa_nmi(int cd); void handle_ibrs_entry(void); void handle_ibrs_exit(void); -void hw_ibrs_recalculate(void); +void hw_ibrs_recalculate(bool all_cpus); void hw_mds_recalculate(void); void hw_ssb_recalculate(bool all_cpus); void x86_taa_recalculate(void); Modified: stable/11/sys/x86/x86/cpu_machdep.c ============================================================================== --- stable/11/sys/x86/x86/cpu_machdep.c Tue Mar 3 15:07:48 2020 (r358581) +++ stable/11/sys/x86/x86/cpu_machdep.c Tue Mar 3 15:12:00 2020 (r358582) @@ -885,23 +885,27 @@ nmi_handle_intr(u_int type, struct trapframe *frame) nmi_call_kdb(PCPU_GET(cpuid), type, frame); } -int hw_ibrs_active; +static int hw_ibrs_active; +int hw_ibrs_ibpb_active; int hw_ibrs_disable = 1; SYSCTL_INT(_hw, OID_AUTO, ibrs_active, CTLFLAG_RD, &hw_ibrs_active, 0, "Indirect Branch Restricted Speculation active"); void -hw_ibrs_recalculate(void) +hw_ibrs_recalculate(bool for_all_cpus) { if ((cpu_ia32_arch_caps & IA32_ARCH_CAP_IBRS_ALL) != 0) { - x86_msr_op(MSR_IA32_SPEC_CTRL, MSR_OP_LOCAL | - (hw_ibrs_disable ? MSR_OP_ANDNOT : MSR_OP_OR), + x86_msr_op(MSR_IA32_SPEC_CTRL, (for_all_cpus ? + MSR_OP_RENDEZVOUS : MSR_OP_LOCAL) | + (hw_ibrs_disable != 0 ? MSR_OP_ANDNOT : MSR_OP_OR), IA32_SPEC_CTRL_IBRS); - return; + hw_ibrs_active = hw_ibrs_disable == 0; + hw_ibrs_ibpb_active = 0; + } else { + hw_ibrs_active = hw_ibrs_ibpb_active = (cpu_stdext_feature3 & + CPUID_STDEXT3_IBPB) != 0 && !hw_ibrs_disable; } - hw_ibrs_active = (cpu_stdext_feature3 & CPUID_STDEXT3_IBPB) != 0 && - !hw_ibrs_disable; } static int @@ -914,7 +918,7 @@ hw_ibrs_disable_handler(SYSCTL_HANDLER_ARGS) if (error != 0 || req->newptr == NULL) return (error); hw_ibrs_disable = val != 0; - hw_ibrs_recalculate(); + hw_ibrs_recalculate(true); return (0); } SYSCTL_PROC(_hw, OID_AUTO, ibrs_disable, CTLTYPE_INT | CTLFLAG_RWTUN |
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