From owner-freebsd-current Sat Jan 9 09:02:21 1999 Return-Path: Received: (from majordom@localhost) by hub.freebsd.org (8.8.8/8.8.8) id JAA17216 for freebsd-current-outgoing; Sat, 9 Jan 1999 09:02:21 -0800 (PST) (envelope-from owner-freebsd-current@FreeBSD.ORG) Received: from verdi.nethelp.no (verdi.nethelp.no [158.36.41.162]) by hub.freebsd.org (8.8.8/8.8.8) with SMTP id JAA17199 for ; Sat, 9 Jan 1999 09:02:17 -0800 (PST) (envelope-from sthaug@nethelp.no) From: sthaug@nethelp.no Received: (qmail 13816 invoked by uid 1001); 9 Jan 1999 17:01:44 +0000 (GMT) To: culverk@wam.umd.edu Cc: wollman@khavrinen.lcs.mit.edu, phiber@udel.edu, current@FreeBSD.ORG Subject: Re: FreeBSD Celeron and Celeron ( Mendocino ) kernel patch. In-Reply-To: Your message of "Sat, 9 Jan 1999 11:58:42 -0500 (EST)" References: X-Mailer: Mew version 1.05+ on Emacs 19.34.2 Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Date: Sat, 09 Jan 1999 18:01:43 +0100 Message-ID: <13814.915901303@verdi.nethelp.no> Sender: owner-freebsd-current@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG > I wasn't disagreeing with that, I was just saying what I said about the > cache. Intel would have you believe that there is not any cache on the > Celeron. There are different Celeron models. The new models (300A, 333A etc.) have 128 kB L2 cache on the chip. The old (non-A) models *do not* have any L2 cache. AFAIK Intel has never made any secret about this. Steinar Haug, Nethelp consulting, sthaug@nethelp.no To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message