From owner-svn-src-head@freebsd.org Tue Sep 1 21:42:09 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 682D937B15A; Tue, 1 Sep 2020 21:42:09 +0000 (UTC) (envelope-from mjg@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Bh0sF1jH6z4QY3; Tue, 1 Sep 2020 21:42:09 +0000 (UTC) (envelope-from mjg@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 0331D1FB7B; Tue, 1 Sep 2020 21:42:09 +0000 (UTC) (envelope-from mjg@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 081Lg8JI036406; Tue, 1 Sep 2020 21:42:08 GMT (envelope-from mjg@FreeBSD.org) Received: (from mjg@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 081Lg8PD036404; Tue, 1 Sep 2020 21:42:08 GMT (envelope-from mjg@FreeBSD.org) Message-Id: <202009012142.081Lg8PD036404@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mjg set sender to mjg@FreeBSD.org using -f From: Mateusz Guzik Date: Tue, 1 Sep 2020 21:42:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r365119 - head/sys/dev/bce X-SVN-Group: head X-SVN-Commit-Author: mjg X-SVN-Commit-Paths: head/sys/dev/bce X-SVN-Commit-Revision: 365119 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 01 Sep 2020 21:42:09 -0000 Author: mjg Date: Tue Sep 1 21:42:08 2020 New Revision: 365119 URL: https://svnweb.freebsd.org/changeset/base/365119 Log: bce: clean up empty lines in .c and .h files Modified: head/sys/dev/bce/if_bce.c head/sys/dev/bce/if_bcefw.h head/sys/dev/bce/if_bcereg.h Modified: head/sys/dev/bce/if_bce.c ============================================================================== --- head/sys/dev/bce/if_bce.c Tue Sep 1 21:41:55 2020 (r365118) +++ head/sys/dev/bce/if_bce.c Tue Sep 1 21:42:08 2020 (r365119) @@ -199,11 +199,9 @@ static const struct bce_type bce_devs[] = { /* BCM5716 controllers and OEM boards. */ { BRCM_VENDORID, BRCM_DEVICEID_BCM5716, PCI_ANY_ID, PCI_ANY_ID, "QLogic NetXtreme II BCM5716 1000Base-T" }, - { 0, 0, 0, 0, NULL } }; - /****************************************************************************/ /* Supported Flash NVRAM device data. */ /****************************************************************************/ @@ -313,7 +311,6 @@ static const struct flash_spec flash_5709 = { .name = "5709/5716 buffered flash (256kB)", }; - /****************************************************************************/ /* FreeBSD device entry points. */ /****************************************************************************/ @@ -322,7 +319,6 @@ static int bce_attach (device_t); static int bce_detach (device_t); static int bce_shutdown (device_t); - /****************************************************************************/ /* BCE Debug Data Structure Dump Routines */ /****************************************************************************/ @@ -365,7 +361,6 @@ static void bce_dump_rv2p_state (struct bce_softc *); static void bce_breakpoint (struct bce_softc *); #endif /*BCE_DEBUG */ - /****************************************************************************/ /* BCE Register/Memory Access Routines */ /****************************************************************************/ @@ -488,7 +483,6 @@ static void bce_tick (void *); static void bce_pulse (void *); static void bce_add_sysctls (struct bce_softc *); - /****************************************************************************/ /* FreeBSD device dispatch table. */ /****************************************************************************/ @@ -667,7 +661,6 @@ static int bce_rx_ticks = DEFAULT_RX_TICKS; SYSCTL_UINT(_hw_bce, OID_AUTO, rx_ticks, CTLFLAG_RDTUN, &bce_rx_ticks, 0, "Receive ticks count"); - /****************************************************************************/ /* Device probe function. */ /* */ @@ -703,11 +696,9 @@ bce_probe(device_t dev) /* Look through the list of known devices for a match. */ while(t->bce_name != NULL) { - if ((vid == t->bce_vid) && (did == t->bce_did) && ((svid == t->bce_svid) || (t->bce_svid == PCI_ANY_ID)) && ((sdid == t->bce_sdid) || (t->bce_sdid == PCI_ANY_ID))) { - descbuf = malloc(BCE_DEVDESC_MAX, M_TEMP, M_NOWAIT); if (descbuf == NULL) @@ -729,7 +720,6 @@ bce_probe(device_t dev) return(ENXIO); } - /****************************************************************************/ /* PCI Capabilities Probe Function. */ /* */ @@ -751,7 +741,6 @@ bce_print_adapter_info(struct bce_softc *sc) printf("Rev (%c%d); ", ((BCE_CHIP_ID(sc) & 0xf000) >> 12) + 'A', ((BCE_CHIP_ID(sc) & 0x0ff0) >> 4)); - /* Bus info. */ if (sc->bce_flags & BCE_PCIE_FLAG) { printf("Bus (PCIe x%d, ", sc->link_width); @@ -815,13 +804,11 @@ bce_print_adapter_info(struct bce_softc *sc) sc->bce_tx_quick_cons_trip, sc->bce_tx_ticks_int, sc->bce_tx_ticks); - } DBEXIT(BCE_VERBOSE_LOAD); } - /****************************************************************************/ /* PCI Capabilities Probe Function. */ /* */ @@ -872,7 +859,6 @@ bce_probe_pci_caps(device_t dev, struct bce_softc *sc) DBEXIT(BCE_VERBOSE_LOAD); } - /****************************************************************************/ /* Load and validate user tunable settings. */ /* */ @@ -1054,7 +1040,6 @@ bce_set_tunables(struct bce_softc *sc) } } - /****************************************************************************/ /* Device attach function. */ /* */ @@ -1115,7 +1100,6 @@ bce_attach(device_t dev) (bce_msi_enable >= 2) && ((sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE)) != NULL)) { - msi_needed = count = 1; if (((error = pci_alloc_msix(dev, &count)) != 0) || @@ -1540,7 +1524,6 @@ bce_attach_exit: return(rc); } - /****************************************************************************/ /* Device detach function. */ /* */ @@ -1593,7 +1576,6 @@ bce_detach(device_t dev) return(0); } - /****************************************************************************/ /* Device shutdown function. */ /* */ @@ -1624,7 +1606,6 @@ bce_shutdown(device_t dev) return (0); } - #ifdef BCE_DEBUG /****************************************************************************/ /* Register read. */ @@ -1641,7 +1622,6 @@ bce_reg_rd(struct bce_softc *sc, u32 offset) return val; } - /****************************************************************************/ /* Register write (16 bit). */ /* */ @@ -1656,7 +1636,6 @@ bce_reg_wr16(struct bce_softc *sc, u32 offset, u16 val REG_WR16(sc, offset, val); } - /****************************************************************************/ /* Register write. */ /* */ @@ -1702,7 +1681,6 @@ bce_reg_rd_ind(struct bce_softc *sc, u32 offset) #endif } - /****************************************************************************/ /* Indirect register write. */ /* */ @@ -1726,7 +1704,6 @@ bce_reg_wr_ind(struct bce_softc *sc, u32 offset, u32 v pci_write_config(dev, BCE_PCICFG_REG_WINDOW, val, 4); } - /****************************************************************************/ /* Shared memory write. */ /* */ @@ -1744,7 +1721,6 @@ bce_shmem_wr(struct bce_softc *sc, u32 offset, u32 val bce_reg_wr_ind(sc, sc->bce_shmem_base + offset, val); } - /****************************************************************************/ /* Shared memory read. */ /* */ @@ -1764,7 +1740,6 @@ bce_shmem_rd(struct bce_softc *sc, u32 offset) return val; } - #ifdef BCE_DEBUG /****************************************************************************/ /* Context memory read. */ @@ -1787,7 +1762,6 @@ bce_ctx_rd(struct bce_softc *sc, u32 cid_addr, u32 ctx offset = ctx_offset + cid_addr; if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { - REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_READ_REQ)); for (idx = 0; idx < retry_cnt; idx++) { @@ -1815,7 +1789,6 @@ bce_ctx_rd(struct bce_softc *sc, u32 cid_addr, u32 ctx } #endif - /****************************************************************************/ /* Context memory write. */ /* */ @@ -1839,7 +1812,6 @@ bce_ctx_wr(struct bce_softc *sc, u32 cid_addr, u32 ctx __FUNCTION__, cid_addr)); if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { - REG_WR(sc, BCE_CTX_CTX_DATA, ctx_val); REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_WRITE_REQ)); @@ -1861,7 +1833,6 @@ bce_ctx_wr(struct bce_softc *sc, u32 cid_addr, u32 ctx } } - /****************************************************************************/ /* PHY register read. */ /* */ @@ -1899,7 +1870,6 @@ bce_miibus_read_reg(device_t dev, int phy, int reg) DELAY(40); } - val = BCE_MIPHY(phy) | BCE_MIREG(reg) | BCE_EMAC_MDIO_COMM_COMMAND_READ | BCE_EMAC_MDIO_COMM_DISEXT | BCE_EMAC_MDIO_COMM_START_BUSY; @@ -1927,7 +1897,6 @@ bce_miibus_read_reg(device_t dev, int phy, int reg) val = REG_RD(sc, BCE_EMAC_MDIO_COMM); } - if (sc->bce_phy_flags & BCE_PHY_INT_MODE_AUTO_POLLING_FLAG) { val = REG_RD(sc, BCE_EMAC_MDIO_MODE); val |= BCE_EMAC_MDIO_MODE_AUTO_POLL; @@ -1942,7 +1911,6 @@ bce_miibus_read_reg(device_t dev, int phy, int reg) return (val & 0xffff); } - /****************************************************************************/ /* PHY register write. */ /* */ @@ -2014,7 +1982,6 @@ bce_miibus_write_reg(device_t dev, int phy, int reg, i return 0; } - /****************************************************************************/ /* MII bus status change. */ /* */ @@ -2127,7 +2094,6 @@ bce_miibus_statchg_exit: DBEXIT(BCE_VERBOSE_PHY); } - /****************************************************************************/ /* Acquire NVRAM lock. */ /* */ @@ -2165,7 +2131,6 @@ bce_acquire_nvram_lock(struct bce_softc *sc) return (rc); } - /****************************************************************************/ /* Release NVRAM lock. */ /* */ @@ -2206,7 +2171,6 @@ bce_release_nvram_lock(struct bce_softc *sc) return (rc); } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Enable NVRAM write access. */ @@ -2251,7 +2215,6 @@ bce_enable_nvram_write(struct bce_softc *sc) return (rc); } - /****************************************************************************/ /* Disable NVRAM write access. */ /* */ @@ -2276,7 +2239,6 @@ bce_disable_nvram_write(struct bce_softc *sc) } #endif - /****************************************************************************/ /* Enable NVRAM access. */ /* */ @@ -2301,7 +2263,6 @@ bce_enable_nvram_access(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_NVRAM); } - /****************************************************************************/ /* Disable NVRAM access. */ /* */ @@ -2326,7 +2287,6 @@ bce_disable_nvram_access(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_NVRAM); } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Erase NVRAM page before writing. */ @@ -2383,7 +2343,6 @@ bce_nvram_erase_page_exit: } #endif /* BCE_NVRAM_WRITE_SUPPORT */ - /****************************************************************************/ /* Read a dword (32 bits) from NVRAM. */ /* */ @@ -2447,7 +2406,6 @@ bce_nvram_read_dword(struct bce_softc *sc, return(rc); } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Write a dword (32 bits) to NVRAM. */ @@ -2507,7 +2465,6 @@ bce_nvram_write_dword(struct bce_softc *sc, u32 offset } #endif /* BCE_NVRAM_WRITE_SUPPORT */ - /****************************************************************************/ /* Initialize NVRAM access. */ /* */ @@ -2571,7 +2528,6 @@ bce_init_nvram(struct bce_softc *sc) /* Look for the matching NVRAM device configuration data. */ for (j = 0, flash = &flash_table[0]; j < entry_count; j++, flash++) { - /* Check if the device matches any of the known devices. */ if ((val & mask) == (flash->strapping & mask)) { /* Found a device match. */ @@ -2621,7 +2577,6 @@ bce_init_nvram_get_flash_size: return rc; } - /****************************************************************************/ /* Read an arbitrary range of data from NVRAM. */ /* */ @@ -2745,7 +2700,6 @@ bce_nvram_read_exit: return rc; } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Write an arbitrary range of data from NVRAM. */ @@ -2872,7 +2826,6 @@ bce_nvram_write(struct bce_softc *sc, u32 offset, u8 * if (!(sc->bce_flash_info->flags & BCE_NV_BUFFERED)) { for (addr = page_start; addr < data_start; addr += 4, i += 4) { - rc = bce_nvram_write_dword(sc, addr, &flash_buffer[i], cmd_flags); @@ -2888,7 +2841,6 @@ bce_nvram_write(struct bce_softc *sc, u32 offset, u8 * if ((addr == page_end - 4) || ((sc->bce_flash_info->flags & BCE_NV_BUFFERED) && (addr == data_end - 4))) { - cmd_flags |= BCE_NVM_COMMAND_LAST; } rc = bce_nvram_write_dword(sc, addr, buf, @@ -2906,7 +2858,6 @@ bce_nvram_write(struct bce_softc *sc, u32 offset, u8 * if (!(sc->bce_flash_info->flags & BCE_NV_BUFFERED)) { for (addr = data_end; addr < page_end; addr += 4, i += 4) { - if (addr == page_end-4) { cmd_flags = BCE_NVM_COMMAND_LAST; } @@ -2947,7 +2898,6 @@ bce_nvram_write_exit: } #endif /* BCE_NVRAM_WRITE_SUPPORT */ - /****************************************************************************/ /* Verifies that NVRAM is accessible and contains valid data. */ /* */ @@ -3023,7 +2973,6 @@ bce_nvram_test_exit: return rc; } - /****************************************************************************/ /* Calculates the size of the buffers to allocate based on the MTU. */ /* */ @@ -3152,7 +3101,6 @@ bce_get_media(struct bce_softc *sc) sc->bce_phy_flags |= BCE_PHY_SERDES_FLAG; if (sc->bce_phy_flags & BCE_PHY_SERDES_FLAG) { - sc->bce_flags |= BCE_NO_WOL_FLAG; if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) @@ -3181,7 +3129,6 @@ bce_get_media_exit: DBEXIT(BCE_VERBOSE_PHY); } - /****************************************************************************/ /* Performs PHY initialization required before MII drivers access the */ /* device. */ @@ -3213,7 +3160,6 @@ bce_init_media(struct bce_softc *sc) } } - /****************************************************************************/ /* Free any DMA memory owned by the driver. */ /* */ @@ -3251,7 +3197,6 @@ bce_dma_free(struct bce_softc *sc) sc->status_tag = NULL; } - /* Free, unmap, and destroy the statistics block. */ if (sc->stats_block_paddr != 0) { bus_dmamap_unload( @@ -3273,7 +3218,6 @@ bce_dma_free(struct bce_softc *sc) sc->stats_tag = NULL; } - /* Free, unmap and destroy all context memory pages. */ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { for (i = 0; i < sc->ctx_pages; i++ ) { @@ -3300,7 +3244,6 @@ bce_dma_free(struct bce_softc *sc) } } - /* Free, unmap and destroy all TX buffer descriptor chain pages. */ for (i = 0; i < sc->tx_pages; i++ ) { if (sc->tx_bd_chain_paddr[i] != 0) { @@ -3325,7 +3268,6 @@ bce_dma_free(struct bce_softc *sc) sc->tx_bd_chain_tag = NULL; } - /* Free, unmap and destroy all RX buffer descriptor chain pages. */ for (i = 0; i < sc->rx_pages; i++ ) { if (sc->rx_bd_chain_paddr[i] != 0) { @@ -3350,7 +3292,6 @@ bce_dma_free(struct bce_softc *sc) sc->rx_bd_chain_tag = NULL; } - /* Free, unmap and destroy all page buffer descriptor chain pages. */ if (bce_hdr_split == TRUE) { for (i = 0; i < sc->pg_pages; i++ ) { @@ -3377,7 +3318,6 @@ bce_dma_free(struct bce_softc *sc) } } - /* Unload and destroy the TX mbuf maps. */ for (i = 0; i < MAX_TX_BD_AVAIL; i++) { if (sc->tx_mbuf_map[i] != NULL) { @@ -3440,7 +3380,6 @@ bce_dma_free(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_UNLOAD | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Get DMA memory from the OS. */ /* */ @@ -3474,7 +3413,6 @@ bce_dma_map_addr(void *arg, bus_dma_segment_t *segs, i } } - /****************************************************************************/ /* Allocate any DMA memory needed by the driver. */ /* */ @@ -3626,7 +3564,6 @@ bce_dma_alloc(device_t dev) } for (i = 0; i < sc->ctx_pages; i++) { - if(bus_dmamem_alloc(sc->ctx_tag, (void **)&sc->ctx_block[i], BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, @@ -3670,7 +3607,6 @@ bce_dma_alloc(device_t dev) } for (i = 0; i < sc->tx_pages; i++) { - if(bus_dmamem_alloc(sc->tx_bd_chain_tag, (void **)&sc->tx_bd_chain[i], BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, @@ -3747,7 +3683,6 @@ bce_dma_alloc(device_t dev) } for (i = 0; i < sc->rx_pages; i++) { - if (bus_dmamem_alloc(sc->rx_bd_chain_tag, (void **)&sc->rx_bd_chain[i], BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, @@ -3881,7 +3816,6 @@ bce_dma_alloc_exit: return(rc); } - /****************************************************************************/ /* Release all resources used by the driver. */ /* */ @@ -3935,7 +3869,6 @@ bce_release_resources(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Firmware synchronization. */ /* */ @@ -3981,7 +3914,6 @@ bce_fw_sync(struct bce_softc *sc, u32 msg_data) /* If we've timed out, tell bootcode that we've stopped waiting. */ if (((val & BCE_FW_MSG_ACK) != (msg_data & BCE_DRV_MSG_SEQ)) && ((msg_data & BCE_DRV_MSG_DATA) != BCE_DRV_MSG_DATA_WAIT0)) { - BCE_PRINTF("%s(%d): Firmware synchronization timeout! " "msg_data = 0x%08X\n", __FILE__, __LINE__, msg_data); @@ -3999,7 +3931,6 @@ bce_fw_sync_exit: return (rc); } - /****************************************************************************/ /* Load Receive Virtual 2 Physical (RV2P) processor firmware. */ /* */ @@ -4047,7 +3978,6 @@ bce_load_rv2p_fw(struct bce_softc *sc, const u32 *rv2p DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Load RISC processor firmware. */ /* */ @@ -4125,7 +4055,6 @@ bce_load_cpu_fw(struct bce_softc *sc, struct cpu_reg * DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Starts the RISC processor. */ /* */ @@ -4150,7 +4079,6 @@ bce_start_cpu(struct bce_softc *sc, struct cpu_reg *cp DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Halts the RISC processor. */ /* */ @@ -4173,7 +4101,6 @@ bce_halt_cpu(struct bce_softc *sc, struct cpu_reg *cpu DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the RX CPU. */ /* */ @@ -4206,7 +4133,6 @@ bce_start_rxp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the RX CPU. */ /* */ @@ -4304,7 +4230,6 @@ bce_init_rxp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the TX CPU. */ /* */ @@ -4401,7 +4326,6 @@ bce_init_txp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the TPAT CPU. */ /* */ @@ -4498,7 +4422,6 @@ bce_init_tpat_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the CP CPU. */ /* */ @@ -4595,7 +4518,6 @@ bce_init_cp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the COM CPU. */ /* */ @@ -4692,7 +4614,6 @@ bce_init_com_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the RV2P, RX, TX, TPAT, COM, and CP CPUs. */ /* */ @@ -4707,7 +4628,6 @@ bce_init_cpus(struct bce_softc *sc) DBENTER(BCE_VERBOSE_RESET); if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { - if ((BCE_CHIP_REV(sc) == BCE_CHIP_REV_Ax)) { bce_load_rv2p_fw(sc, bce_xi90_rv2p_proc1, sizeof(bce_xi90_rv2p_proc1), RV2P_PROC1); @@ -4736,7 +4656,6 @@ bce_init_cpus(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize context memory. */ /* */ @@ -4809,7 +4728,6 @@ bce_init_ctx(struct bce_softc *sc) } } } else { - DBPRINT(sc, BCE_INFO, "Initializing 5706/5708 context.\n"); /* @@ -4820,7 +4738,6 @@ bce_init_ctx(struct bce_softc *sc) vcid_addr = GET_CID_ADDR(96); while (vcid_addr) { - vcid_addr -= PHY_CTX_SIZE; REG_WR(sc, BCE_CTX_VIRT_ADDR, 0); @@ -4833,14 +4750,12 @@ bce_init_ctx(struct bce_softc *sc) REG_WR(sc, BCE_CTX_VIRT_ADDR, vcid_addr); REG_WR(sc, BCE_CTX_PAGE_TBL, vcid_addr); } - } init_ctx_fail: DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_CTX); return (rc); } - /****************************************************************************/ /* Fetch the permanent MAC address of the controller. */ /* */ @@ -4883,7 +4798,6 @@ bce_get_mac_addr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Program the MAC address. */ /* */ @@ -4914,7 +4828,6 @@ bce_set_mac_addr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Stop the controller. */ /* */ @@ -4959,7 +4872,6 @@ bce_stop(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - static int bce_reset(struct bce_softc *sc, u32 reset_code) { @@ -5082,7 +4994,6 @@ bce_reset_exit: return (rc); } - static int bce_chipinit(struct bce_softc *sc) { @@ -5183,7 +5094,6 @@ bce_chipinit_exit: return(rc); } - /****************************************************************************/ /* Initialize the controller in preparation to send/receive traffic. */ /* */ @@ -5353,7 +5263,6 @@ bce_blockinit_exit: return (rc); } - /****************************************************************************/ /* Encapsulate an mbuf into the rx_bd chain. */ /* */ @@ -5468,7 +5377,6 @@ bce_get_rx_buf_exit: return(rc); } - /****************************************************************************/ /* Encapsulate an mbuf cluster into the page chain. */ /* */ @@ -5572,7 +5480,6 @@ bce_get_pg_buf_exit: return(rc); } - /****************************************************************************/ /* Initialize the TX context memory. */ /* */ @@ -5622,7 +5529,6 @@ bce_init_tx_context(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_SEND | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Allocate memory and initialize the TX data structures. */ /* */ @@ -5682,7 +5588,6 @@ bce_init_tx_chain(struct bce_softc *sc) return(rc); } - /****************************************************************************/ /* Free memory and clear the TX data structures. */ /* */ @@ -5724,7 +5629,6 @@ bce_free_tx_chain(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_SEND | BCE_VERBOSE_UNLOAD); } - /****************************************************************************/ /* Initialize the RX context memory. */ /* */ @@ -5798,7 +5702,6 @@ bce_init_rx_context(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_RECV | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Allocate memory and initialize the RX data structures. */ /* */ @@ -5862,7 +5765,6 @@ bce_init_rx_chain(struct bce_softc *sc) return(rc); } - /****************************************************************************/ /* Add mbufs to the RX chain until its full or an mbuf allocation error */ /* occurs. */ @@ -5910,7 +5812,6 @@ bce_fill_rx_chain(struct bce_softc *sc) BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Free memory and clear the RX data structures. */ /* */ @@ -5953,7 +5854,6 @@ bce_free_rx_chain(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_RECV | BCE_VERBOSE_UNLOAD); } - /****************************************************************************/ /* Allocate memory and initialize the page data structures. */ /* Assumes that bce_init_rx_chain() has not already been called. */ @@ -6033,7 +5933,6 @@ bce_init_pg_chain(struct bce_softc *sc) return(rc); } - /****************************************************************************/ /* Add mbufs to the page chain until its full or an mbuf allocation error */ /* occurs. */ @@ -6080,7 +5979,6 @@ bce_fill_pg_chain(struct bce_softc *sc) BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Free memory and clear the RX data structures. */ /* */ @@ -6121,7 +6019,6 @@ bce_free_pg_chain(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_RECV | BCE_VERBOSE_UNLOAD); } - static u32 bce_get_rphy_link(struct bce_softc *sc) { @@ -6170,7 +6067,6 @@ bce_get_rphy_link(struct bce_softc *sc) return (advertise); } - /****************************************************************************/ /* Set media options. */ /* */ @@ -6193,7 +6089,6 @@ bce_ifmedia_upd(struct ifnet *ifp) return (error); } - /****************************************************************************/ /* Set media options. */ /* */ @@ -6316,7 +6211,6 @@ bce_ifmedia_upd_locked(struct ifnet *ifp) return (error); } - static void bce_ifmedia_sts_rphy(struct bce_softc *sc, struct ifmediareq *ifmr) { @@ -6395,7 +6289,6 @@ bce_ifmedia_sts_rphy(struct bce_softc *sc, struct ifme ifmr->ifm_active |= IFM_ETH_TXPAUSE; } - /****************************************************************************/ /* Reports current media status. */ /* */ @@ -6431,7 +6324,6 @@ bce_ifmedia_sts(struct ifnet *ifp, struct ifmediareq * DBEXIT(BCE_VERBOSE_PHY); } - /****************************************************************************/ /* Handles PHY generated interrupt events. */ /* */ @@ -6454,7 +6346,6 @@ bce_phy_intr(struct bce_softc *sc) /* Handle any changes if the link state has changed. */ if (new_link_state != old_link_state) { - /* Update the status_attn_bits_ack field. */ if (new_link_state) { REG_WR(sc, BCE_PCICFG_STATUS_BIT_SET_CMD, @@ -6497,7 +6388,6 @@ bce_phy_intr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_PHY | BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Reads the receive consumer value from the status block (skipping over */ /* chain page pointer if necessary). */ @@ -6740,7 +6630,6 @@ bce_rx_intr(struct bce_softc *sc) if (status & (L2_FHDR_ERRORS_BAD_CRC | L2_FHDR_ERRORS_PHY_DECODE | L2_FHDR_ERRORS_ALIGNMENT | L2_FHDR_ERRORS_TOO_SHORT | L2_FHDR_ERRORS_GIANT_FRAME)) { - /* Log the error and release the mbuf. */ sc->l2fhdr_error_count++; m_freem(m0); @@ -6770,7 +6659,6 @@ bce_rx_intr(struct bce_softc *sc) /* Check for a valid TCP/UDP frame. */ if (status & (L2_FHDR_STATUS_TCP_SEGMENT | L2_FHDR_STATUS_UDP_DATAGRAM)) { - /* Check for a good TCP/UDP checksum. */ if ((status & (L2_FHDR_ERRORS_TCP_XSUM | L2_FHDR_ERRORS_UDP_XSUM)) == 0) { @@ -6870,7 +6758,6 @@ bce_rx_intr_next_rx: DBEXIT(BCE_VERBOSE_RECV | BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Reads the transmit consumer value from the status block (skipping over */ /* chain page pointer if necessary). */ @@ -6891,7 +6778,6 @@ bce_get_hw_tx_cons(struct bce_softc *sc) return hw_cons; } - /****************************************************************************/ /* Handles transmit completion interrupt events. */ /* */ @@ -6955,7 +6841,6 @@ bce_tx_intr(struct bce_softc *sc) * has an mbuf pointer and DMA map. */ if (sc->tx_mbuf_ptr[sw_tx_chain_cons] != NULL) { - /* Validate that this is the last tx_bd. */ DBRUNIF((!(txbd->tx_bd_flags & TX_BD_FLAGS_END)), BCE_PRINTF("%s(%d): tx_bd END flag not set but " @@ -7010,7 +6895,6 @@ bce_tx_intr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_SEND | BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Disables interrupt generation. */ /* */ @@ -7028,7 +6912,6 @@ bce_disable_intr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Enables interrupt generation. */ /* */ @@ -7054,7 +6937,6 @@ bce_enable_intr(struct bce_softc *sc, int coal_now) DBEXIT(BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Handles controller initialization. */ /* */ @@ -7167,7 +7049,6 @@ bce_init_locked_exit: DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the controller just enough so that any management firmware */ /* running on the device will continue to operate correctly. */ @@ -7204,7 +7085,6 @@ bce_mgmt_init_locked_exit: DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Handles controller initialization when called from an unlocked routine. */ /* */ @@ -7225,7 +7105,6 @@ bce_init(void *xsc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Modifies an mbuf for TSO on the hardware. */ /* */ @@ -7342,7 +7221,6 @@ bce_tso_setup(struct bce_softc *sc, struct mbuf **m_he return (*m_head); } - /****************************************************************************/ /* Encapsultes an mbuf cluster into the tx_bd chain structure and makes the */ /* memory visible to the controller. */ @@ -7482,7 +7360,6 @@ bce_tx_encap(struct bce_softc *sc, struct mbuf **m_hea * the mbuf. */ for (i = 0; i < nsegs ; i++) { - chain_prod = TX_CHAIN_IDX(prod); txbd= &sc->tx_bd_chain[TX_PAGE(chain_prod)] [TX_IDX(chain_prod)]; @@ -7542,7 +7419,6 @@ bce_tx_encap_exit: return(rc); } - /****************************************************************************/ /* Main transmit routine when called from another routine with a lock. */ /* */ @@ -7587,7 +7463,6 @@ bce_start_locked(struct ifnet *ifp) * Keep adding entries while there is space in the ring. */ while (sc->used_tx_bd < sc->max_tx_bd) { - /* Check for any frames to send. */ IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); @@ -7637,7 +7512,6 @@ bce_start_locked_exit: DBEXIT(BCE_VERBOSE_SEND | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Main transmit routine when called from another routine without a lock. */ /* */ @@ -7658,7 +7532,6 @@ bce_start(struct ifnet *ifp) *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***