From owner-cvs-all Thu May 23 6:43:51 2002 Delivered-To: cvs-all@freebsd.org Received: from mail.speakeasy.net (mail15.speakeasy.net [216.254.0.215]) by hub.freebsd.org (Postfix) with ESMTP id 2A5E137B403 for ; Thu, 23 May 2002 06:43:46 -0700 (PDT) Received: (qmail 24966 invoked from network); 23 May 2002 13:43:44 -0000 Received: from unknown (HELO server.baldwin.cx) ([216.27.160.63]) (envelope-sender ) by mail15.speakeasy.net (qmail-ldap-1.03) with DES-CBC3-SHA encrypted SMTP for ; 23 May 2002 13:43:44 -0000 Received: from laptop.baldwin.cx (gw1.twc.weather.com [216.133.140.1]) by server.baldwin.cx (8.11.6/8.11.6) with ESMTP id g4NDhhF04213; Thu, 23 May 2002 09:43:43 -0400 (EDT) (envelope-from jhb@FreeBSD.org) Message-ID: X-Mailer: XFMail 1.5.2 on FreeBSD X-Priority: 3 (Normal) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 8bit MIME-Version: 1.0 In-Reply-To: <20020523161537.A10471@gsmx07.alcatel.com.au> Date: Thu, 23 May 2002 09:43:22 -0400 (EDT) From: John Baldwin To: Peter Jeremy Subject: Re: cvs commit: src/sys/kern kern_mutex.c Cc: cvs-all@FreeBSD.ORG, cvs-committers@FreeBSD.ORG Sender: owner-cvs-all@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG On 23-May-2002 Peter Jeremy wrote: > On 2002-May-21 15:26:36 -0700, John Baldwin wrote: >> Add appropriate IA32 "pause" instructions to improve performanec on >> Pentium 4's and newer IA32 processors. The "pause" instruction has been >> verified by Intel to be a NOP on all currently existing IA32 processors >> prior to the Pentium 4. > > What about non-Intel iA32 look-alikes? And does "currently existing > IA32 processors" mean everything back to the 80386, or just Pentium > and later (when Intel started using the "iA32" name)? In Intel's documentation they said that all current look-alikes worked as well. It's the opcode for 'rep mov'. I am curious if some implementations trash %ecx, and if we are paranoid we could always clobber %ecx in the constraints. I think IA32 just goes back to the 386, but FreeBSD doesn't run on 8086, 80186, or 80826's anyways. The quote from the Intel manual about using 'pause' to optimize spinlocks is: Btw, the number for this PDF is: 248674-001 "On the Pentium 4 processor, the instruction behaves as described above, resulting in a net performance improvement. However for all known existing IA-32 processors the instruction is interpreted as a NOP (no operation) and does not affect the program in any way. It has been verified that PAUSE is a NOP for all known Intel architectures prior to the Pentium 4 processor. It is even known to behave as a NOP on the non-Intel x86 family processors that were available at the time of testing." > Peter -- John Baldwin <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve!" - http://www.FreeBSD.org/ To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message