From owner-freebsd-current@FreeBSD.ORG Thu Nov 6 21:09:50 2003 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 0879016A4CE for ; Thu, 6 Nov 2003 21:09:50 -0800 (PST) Received: from web25101.mail.ukl.yahoo.com (web25101.mail.ukl.yahoo.com [217.12.10.49]) by mx1.FreeBSD.org (Postfix) with SMTP id E639143FDD for ; Thu, 6 Nov 2003 21:09:48 -0800 (PST) (envelope-from rmhlldr@yahoo.co.uk) Message-ID: <20031107050948.64249.qmail@web25101.mail.ukl.yahoo.com> Received: from [194.44.215.148] by web25101.mail.ukl.yahoo.com via HTTP; Fri, 07 Nov 2003 05:09:48 GMT Date: Fri, 7 Nov 2003 05:09:48 +0000 (GMT) From: =?iso-8859-1?q?RMH?= To: current@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Subject: Re: Intel I440GX+ X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list Reply-To: rhett@alasir.com List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Nov 2003 05:09:50 -0000 Roberto de Iriarte wrote: > > Scott Likens wrote: > > >On Thu, 2003-11-06 at 03:27, Tom wrote: > > > > > >>On Thu, 6 Nov 2003, Scott Likens wrote: > >> > >>... > >> > >> > >>>Onboard SCSI, 1gig of ECC, dual P2-450's. Never had this problem > >>>before. > >>> > >>> > >> I hope you are using P3s, or Xeon CPUs not P2s, since P2s are not able > >>to cache memory above 512MB, which means that things will be real slow. > >> > >> > > > >No, Dual P2 Xeons. > > > > > > > Hmmm ? Are you sure ? I own an L440GX+ and Xeon's do not fit on it. You > might have either > an MS440GX or a C440GX, the former being a workstation board (with AGP), > the later an entry level server board > if there are PII Xeon CPU's on it. Only first PIIs had L2 cache which was unable to store data located beyond 512Mb memory boundary (233-300MHz, Klamath), and some of them even didn't support ECC for L2 cache. All the next PIIs (333-450MHz, Deschutes) had L2 cache with ECC, capable of all 4Gb. So PIIs are not so bad as some people may think. Besides, L2 cache of PIIXeons and some PIIIXeons (Drake & Tanner) is slow because it is off-core, regardless of running at full core speed. --- Regards, Rhett ________________________________________________________________________ Want to chat instantly with your online friends? Get the FREE Yahoo! Messenger http://mail.messenger.yahoo.co.uk