From owner-freebsd-security@freebsd.org  Fri Jan  5 08:04:20 2018
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From: =?utf-8?Q?Dag-Erling_Sm=C3=B8rgrav?= <des@des.no>
To: Erich Dollansky <freebsd.ed.lists@sumeritec.com>
Cc: freebsd-security@freebsd.org
Subject: Re: Intel hardware bug
References: <02563ce4-437c-ab96-54bb-a8b591900ba0@FreeBSD.org>
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 <20180104132807.266fe46c.freebsd.ed.lists@sumeritec.com>
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 <20180105104020.51c2a742.freebsd.ed.lists@sumeritec.com>
Date: Fri, 05 Jan 2018 09:02:41 +0100
In-Reply-To: <20180105104020.51c2a742.freebsd.ed.lists@sumeritec.com> (Erich
 Dollansky's message of "Fri, 5 Jan 2018 10:40:20 +0800")
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Erich Dollansky <freebsd.ed.lists@sumeritec.com> writes:
> [much elided]
> Directly yes, not if the kernel memory would be always in a different
> segment. It would land then in cache only when memory near segment
> bounds are accessed. Which could be easily avoided.

Are you familiar with the expression =E2=80=9Cnot even wrong=E2=80=9D?

DES
--=20
Dag-Erling Sm=C3=B8rgrav - des@des.no