From owner-svn-src-all@freebsd.org Wed Oct 21 02:50:24 2015 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0D466A1AC0C; Wed, 21 Oct 2015 02:50:24 +0000 (UTC) (envelope-from kevlo@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id CB94B19D5; Wed, 21 Oct 2015 02:50:23 +0000 (UTC) (envelope-from kevlo@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id t9L2oMcg087204; Wed, 21 Oct 2015 02:50:22 GMT (envelope-from kevlo@FreeBSD.org) Received: (from kevlo@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id t9L2oMcN087203; Wed, 21 Oct 2015 02:50:22 GMT (envelope-from kevlo@FreeBSD.org) Message-Id: <201510210250.t9L2oMcN087203@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: kevlo set sender to kevlo@FreeBSD.org using -f From: Kevin Lo Date: Wed, 21 Oct 2015 02:50:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r289674 - head/sys/dev/iwn X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Oct 2015 02:50:24 -0000 Author: kevlo Date: Wed Oct 21 02:50:22 2015 New Revision: 289674 URL: https://svnweb.freebsd.org/changeset/base/289674 Log: Switch PCI register reads from using magic numbers to using the names defined in pcireg.h Modified: head/sys/dev/iwn/if_iwn.c Modified: head/sys/dev/iwn/if_iwn.c ============================================================================== --- head/sys/dev/iwn/if_iwn.c Wed Oct 21 01:45:18 2015 (r289673) +++ head/sys/dev/iwn/if_iwn.c Wed Oct 21 02:50:22 2015 (r289674) @@ -6280,8 +6280,8 @@ iwn_set_pslevel(struct iwn_softc *sc, in if (level == 5) cmd.flags |= htole16(IWN_PS_FAST_PD); /* Retrieve PCIe Active State Power Management (ASPM). */ - reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); - if (!(reg & 0x1)) /* L0s Entry disabled. */ + reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4); + if (!(reg & PCIEM_LINK_CTL_ASPMC_L0S)) /* L0s Entry disabled. */ cmd.flags |= htole16(IWN_PS_PCI_PMGT); cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024); cmd.txtimeout = htole32(pmgt->txtimeout * 1024); @@ -8280,9 +8280,9 @@ iwn_apm_init(struct iwn_softc *sc) IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A); /* Retrieve PCIe Active State Power Management (ASPM). */ - reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1); + reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4); /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */ - if (reg & 0x02) /* L1 Entry enabled. */ + if (reg & PCIEM_LINK_CTL_ASPMC_L1) /* L1 Entry enabled. */ IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA); else IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);