Date: Wed, 28 Dec 2016 08:46:53 -0500 From: Alexander Kabaev <kabaev@gmail.com> To: Adrian Chadd <adrian.chadd@gmail.com> Cc: Alexander Kabaev <kan@freebsd.org>, "src-committers@freebsd.org" <src-committers@freebsd.org>, "svn-src-all@freebsd.org" <svn-src-all@freebsd.org>, "svn-src-head@freebsd.org" <svn-src-head@freebsd.org> Subject: Re: svn commit: r310650 - in head/sys/mips: include mips Message-ID: <20161228084653.0326caa4@kan> In-Reply-To: <CAJ-Vmo=bMUNbfgaTdUC8ToN9yLZuyqN5ws79vmwP8OJcRfR1ag@mail.gmail.com> References: <201612280255.uBS2tQeR045512@repo.freebsd.org> <CAJ-Vmo=bMUNbfgaTdUC8ToN9yLZuyqN5ws79vmwP8OJcRfR1ag@mail.gmail.com>
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--Sig_/y/NNRm+pci6OV9c.3sVTdHg Content-Type: text/plain; charset=KOI8-R Content-Transfer-Encoding: quoted-printable On Tue, 27 Dec 2016 21:50:32 -0800 Adrian Chadd <adrian.chadd@gmail.com> wrote: > hiya, >=20 > so I dug into the mips24k definition of this. It says this: >=20 > " > 3.4.3 Uncached accelerated writes > The 24K core permits memory regions to be marked as "uncached > accelerated". This type of region is useful to hard- > ware which is "write only" - perhaps video frame buffers, or some > other hardware stream. Sequential word stores in > such regions are gathered into cache-line-sized chunks, before being > written with a single burst cycle on the CPU > interface. > Such regions are uncached for read, and partial-word or > out-of-sequence writes have "unpredictable" effects - don't > do them. The burst write is normally performed when software writes to > the last location in the memory block or does > an uncached-accelerated write to some other block; but it can also be > triggered by a > sync instruction, a pref nudge, a matching load or any exception. If > the block is not completely written by the time it's pushed out, it > will be written using a series of doubleword or smaller write cycles > over the 24K core's 64-bit memory interface. > " >=20 > So, question is - is our write combining page attribute in the VM > suitable for this? Is it defined as "only do full sequential word > writes"? Or do we risk having some other platform use it in a less > "don't do this" way and then MIPS is the one at fault again? :) >=20 >=20 > -adrian >=20 >=20 FWIW, this is more or less standard verbiage for memory mapped devices and devices is where one would expect framebuffer to reside, so I would not read too much into it. I committed change that does not map UA to WC unconditionally and will let people who need write combining to enable it on a case by case basis. For now, only Ingenic XBursts are doing so as these are ones I have tested. --=20 Alexander Kabaev --Sig_/y/NNRm+pci6OV9c.3sVTdHg Content-Type: application/pgp-signature Content-Description: Цифровая подпись OpenPGP -----BEGIN PGP SIGNATURE----- iQKTBAEBCgB9FiEExffZlZm2QeE8UVaRBxMimZJ5Ln4FAlhjwk1fFIAAAAAALgAo aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldEM1 RjdEOTk1OTlCNjQxRTEzQzUxNTY5MTA3MTMyMjk5OTI3OTJFN0UACgkQBxMimZJ5 Ln4O9A/+Ll0BXYm9sUys0R9sxrnrMOTouq+vOB5VCkkx7ztmTuRVX9WaXe51q7T+ e0gRcvr61jViiF+aFJFWEjCWKjkO1jcnSKB3X1Mtz5gy/hiLRnxhdIRlh4DMsQAn Az+KtM1ozixIHaohU2ARQvL+rt/vHkaDng6wwtZ9xnbajNcMeXArXlRBCnzl6mCN igDQo3/i7v7ZcsoufYegsQo87lV/iLPOo4PpStBJxL2IDl9lSXJxY80twRGGRHFt V6rRVRdQbeHYYvg5eNBpXZL209CgChvatSOyqqU97sIsA39ozFV9j1AG4GVrD5+p CGBUvOYE76a8VL7xXAHpipOlNn9dS+bT9MmzB4czYgcUDtySOuYksOKSWilkjNSn ARYVY2AIJpId14mN94qjs3o08QpHzMb53tteRgLTRapgoCct5Je/gAeq0FPaFcBk TnjVAXzLQ5SxBQkLZklJ/VHV8h2NUGWms5jhDF0DHZojPpk/FmBHXRhY41GVNRas P99gZX0LOKH+i4y3njDzbw3FANL53lJUyZxCTvAYV5mq3HbLQDZYeL+OrPWSIO+H DE+gqawrLvJA4JLlwWV/Wx93jTM95I+qbMZaUk9Dn3BbAeeHP31W9fWRtW/qCKaj 5QIV4IzWZULG858cP/Aty7201kA53LJPPDzUCPpLB6y5Q6+VYeo= =PSbE -----END PGP SIGNATURE----- --Sig_/y/NNRm+pci6OV9c.3sVTdHg--
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