Date: Fri, 23 Aug 2002 19:23:22 -0400 From: Bosko Milekic <bmilekic@unixdaemons.com> To: Peter Wemm <peter@wemm.org> Cc: Martin Blapp <mb@imp.ch>, cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: Hurrah ! Re: cvs commit: src/sys/i386/isa apic_vector.s Message-ID: <20020823192322.A39869@unixdaemons.com> In-Reply-To: <20020823222134.33F582A7D6@canning.wemm.org>; from peter@wemm.org on Fri, Aug 23, 2002 at 03:21:34PM -0700 References: <20020824000117.M50084-100000@levais.imp.ch> <20020823222134.33F582A7D6@canning.wemm.org>
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Once you can confirm this to work on SMP I'll give it a whirl and play with the "bug(s)" I stumbled on on the PPro and pII as well as some others... I'll only be able to look at this tomorrow at earliest, though. Thanks for all this work! -Bosko On Fri, Aug 23, 2002 at 03:21:34PM -0700, Peter Wemm wrote: > Martin Blapp wrote: > > > > > > Hi Peter ! > > > > > Ok, somebody please shoot me. The asm I wrote for the ranged IPI shootdo > wn > > > was wrong. It only ever invalidated one page due to me getting the loop > > > terminator wrong. This explains the DISABLE_PG_G effect on SMP. > > > > Also viewable on UP ? This is not a UP machine. Should this fix > > also make the effect on UP machines disappear ? > > No, but I have another patch that I'd like you to test shortly. I need > to do a couple more sanity checks to make sure it doesn't break SMP. It > works on my laptop. It *might* just happen solve the pentium4 UP problems. > Note that it is not directly related to pentium4 bugs but tries to solve > some other dubious problems. > > If you are feeling brave, you may like to try this early: > http://people.freebsd.org/%7Epeter/4mb.diff > I'm pretty sure it is ok on UP, but it might make SMP explode during > AP startup as I've not yet finished untangling the hacks. > > What it does is this: > - Move the default load address of the kernel from 1MB to 4MB. > - This avoids having a 4MB page pointing at physical address zero, which > some early intel errata say is a Bad Idea which causes strange TLB bugs. > - This means we can undo a bunch of hacks to temporarily disable or defer 4MB > mode during SMP startup. XXX not yet finished for the SMP case. > - It should solve the ppro startup bugs we had in a non-hackish fashion. > - It now puts ALL of the kernel in as many 4MB pages as are needed. Previously > only the first 3MB would fit and the rest would run from 4K pages. > > If it happens to solve the Pentium4 problems, then that would be a bonus. > Given that disabling PSE mode seems to have some effect, tidying this up > just might do something useful here. > > Yes, it is configurable so that this doesn't absolutely rule out running > a tiny stripped down kernel on a 4MB machine. (fat chance of it being > possible, but I wont be the one to guarantee it not working :) > > I've also considered the possibility that we may need to set up the > initial page table in locore in 4MB mode to truely avoid the overlapping > 4K/4M tlb issues. At least the underlying 4K pages do not have the global > bit set so they will expire. > > Cheers, > -Peter > -- > Peter Wemm - peter@wemm.org; peter@FreeBSD.org; peter@yahoo-inc.com > "All of this is for nothing if we don't go to the stars" - JMS/B5 > -- Bosko Milekic * bmilekic@unixdaemons.com * bmilekic@FreeBSD.org To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message
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