From owner-svn-src-all@freebsd.org Fri Feb 28 18:32:36 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id E4D602416ED; Fri, 28 Feb 2020 18:32:36 +0000 (UTC) (envelope-from rlibby@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 48TdSN4VSYz47bp; Fri, 28 Feb 2020 18:32:36 +0000 (UTC) (envelope-from rlibby@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 808DE6029; Fri, 28 Feb 2020 18:32:36 +0000 (UTC) (envelope-from rlibby@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 01SIWahu071686; Fri, 28 Feb 2020 18:32:36 GMT (envelope-from rlibby@FreeBSD.org) Received: (from rlibby@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 01SIWaEL071685; Fri, 28 Feb 2020 18:32:36 GMT (envelope-from rlibby@FreeBSD.org) Message-Id: <202002281832.01SIWaEL071685@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: rlibby set sender to rlibby@FreeBSD.org using -f From: Ryan Libby Date: Fri, 28 Feb 2020 18:32:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r358439 - head/sys/amd64/include X-SVN-Group: head X-SVN-Commit-Author: rlibby X-SVN-Commit-Paths: head/sys/amd64/include X-SVN-Commit-Revision: 358439 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Feb 2020 18:32:37 -0000 Author: rlibby Date: Fri Feb 28 18:32:36 2020 New Revision: 358439 URL: https://svnweb.freebsd.org/changeset/base/358439 Log: amd64 atomic.h: minor codegen optimization in flag access Previously the pattern to extract status flags from inline assembly blocks was to use setcc in the block to write the flag to a register. This was suboptimal in a few ways: - It would lead to code like: sete %cl; test %cl; jne, i.e. a flag would just be loaded into a register and then reloaded to a flag. - The setcc would force the block to use an additional register. - If the client code didn't care for the flag value then the setcc would be entirely pointless but could not be eliminated by the optimizer. A more modern inline asm construct (since gcc 6 and clang 9) allows for "flag output operands", where a C variable can be written directly from a flag. The optimizer can then use this to produce direct code where the flag does not take a trip through a register. In practice this makes each affected operation sequence shorter by five bytes of instructions. It's unlikely this has a measurable performance impact. Reviewed by: kib, markj, mjg Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D23869 Modified: head/sys/amd64/include/atomic.h Modified: head/sys/amd64/include/atomic.h ============================================================================== --- head/sys/amd64/include/atomic.h Fri Feb 28 17:41:46 2020 (r358438) +++ head/sys/amd64/include/atomic.h Fri Feb 28 18:32:36 2020 (r358439) @@ -201,9 +201,8 @@ atomic_cmpset_##TYPE(volatile u_##TYPE *dst, u_##TYPE __asm __volatile( \ " " MPLOCKED " " \ " cmpxchg %3,%1 ; " \ - " sete %0 ; " \ "# atomic_cmpset_" #TYPE " " \ - : "=q" (res), /* 0 */ \ + : "=@cce" (res), /* 0 */ \ "+m" (*dst), /* 1 */ \ "+a" (expect) /* 2 */ \ : "r" (src) /* 3 */ \ @@ -219,9 +218,8 @@ atomic_fcmpset_##TYPE(volatile u_##TYPE *dst, u_##TYPE __asm __volatile( \ " " MPLOCKED " " \ " cmpxchg %3,%1 ; " \ - " sete %0 ; " \ "# atomic_fcmpset_" #TYPE " " \ - : "=q" (res), /* 0 */ \ + : "=@cce" (res), /* 0 */ \ "+m" (*dst), /* 1 */ \ "+a" (*expect) /* 2 */ \ : "r" (src) /* 3 */ \ @@ -278,9 +276,8 @@ atomic_testandset_int(volatile u_int *p, u_int v) __asm __volatile( " " MPLOCKED " " " btsl %2,%1 ; " - " setc %0 ; " "# atomic_testandset_int" - : "=q" (res), /* 0 */ + : "=@ccc" (res), /* 0 */ "+m" (*p) /* 1 */ : "Ir" (v & 0x1f) /* 2 */ : "cc"); @@ -295,9 +292,8 @@ atomic_testandset_long(volatile u_long *p, u_int v) __asm __volatile( " " MPLOCKED " " " btsq %2,%1 ; " - " setc %0 ; " "# atomic_testandset_long" - : "=q" (res), /* 0 */ + : "=@ccc" (res), /* 0 */ "+m" (*p) /* 1 */ : "Jr" ((u_long)(v & 0x3f)) /* 2 */ : "cc"); @@ -312,9 +308,8 @@ atomic_testandclear_int(volatile u_int *p, u_int v) __asm __volatile( " " MPLOCKED " " " btrl %2,%1 ; " - " setc %0 ; " "# atomic_testandclear_int" - : "=q" (res), /* 0 */ + : "=@ccc" (res), /* 0 */ "+m" (*p) /* 1 */ : "Ir" (v & 0x1f) /* 2 */ : "cc"); @@ -329,9 +324,8 @@ atomic_testandclear_long(volatile u_long *p, u_int v) __asm __volatile( " " MPLOCKED " " " btrq %2,%1 ; " - " setc %0 ; " "# atomic_testandclear_long" - : "=q" (res), /* 0 */ + : "=@ccc" (res), /* 0 */ "+m" (*p) /* 1 */ : "Jr" ((u_long)(v & 0x3f)) /* 2 */ : "cc");