From owner-svn-src-all@freebsd.org Thu Sep 26 15:37:40 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id CB77C12A40B; Thu, 26 Sep 2019 15:37:40 +0000 (UTC) (envelope-from markj@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46fJw44jy2z4PBC; Thu, 26 Sep 2019 15:37:40 +0000 (UTC) (envelope-from markj@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 85D4E2468; Thu, 26 Sep 2019 15:37:40 +0000 (UTC) (envelope-from markj@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x8QFbeOP050051; Thu, 26 Sep 2019 15:37:40 GMT (envelope-from markj@FreeBSD.org) Received: (from markj@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x8QFbeAA050050; Thu, 26 Sep 2019 15:37:40 GMT (envelope-from markj@FreeBSD.org) Message-Id: <201909261537.x8QFbeAA050050@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: markj set sender to markj@FreeBSD.org using -f From: Mark Johnston Date: Thu, 26 Sep 2019 15:37:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r352749 - stable/12/sys/dev/jme X-SVN-Group: stable-12 X-SVN-Commit-Author: markj X-SVN-Commit-Paths: stable/12/sys/dev/jme X-SVN-Commit-Revision: 352749 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Sep 2019 15:37:40 -0000 Author: markj Date: Thu Sep 26 15:37:40 2019 New Revision: 352749 URL: https://svnweb.freebsd.org/changeset/base/352749 Log: MFC r352625: Revert r316820. PR: 233952 Modified: stable/12/sys/dev/jme/if_jme.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/jme/if_jme.c ============================================================================== --- stable/12/sys/dev/jme/if_jme.c Thu Sep 26 15:35:35 2019 (r352748) +++ stable/12/sys/dev/jme/if_jme.c Thu Sep 26 15:37:40 2019 (r352749) @@ -559,7 +559,7 @@ jme_map_intr_vector(struct jme_softc *sc) bzero(map, sizeof(map)); /* Map Tx interrupts source to MSI/MSIX vector 2. */ - map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] |= + map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] = MSINUM_INTR_SOURCE(2, N_INTR_TXQ0_COMP); map[MSINUM_REG_INDEX(N_INTR_TXQ1_COMP)] |= MSINUM_INTR_SOURCE(2, N_INTR_TXQ1_COMP); @@ -581,37 +581,37 @@ jme_map_intr_vector(struct jme_softc *sc) MSINUM_INTR_SOURCE(2, N_INTR_TXQ_COAL_TO); /* Map Rx interrupts source to MSI/MSIX vector 1. */ - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] |= + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] = MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL_TO); /* Map all other interrupts source to MSI/MSIX vector 0. */